Commit 41716861 authored by Anup Patel's avatar Anup Patel Committed by Anup Patel
Browse files

RISC-V: KVM: Allow Zba and Zbs extensions for Guest/VM 



We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zba and Zbs extensions for Guest/VM.

Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 61302944

arch/riscv/include/uapi/asm/kvm.h

+2 −0
Original line number Diff line number Diff line
@@ -124,6 +124,8 @@ enum KVM_RISCV_ISA_EXT_ID { 
	KVM_RISCV_ISA_EXT_SSAIA,

	KVM_RISCV_ISA_EXT_V,

	KVM_RISCV_ISA_EXT_SVNAPOT,

	KVM_RISCV_ISA_EXT_ZBA,

	KVM_RISCV_ISA_EXT_ZBS,

	KVM_RISCV_ISA_EXT_MAX,

};

arch/riscv/kvm/vcpu_onereg.c

+4 −0
Original line number Diff line number Diff line
@@ -38,7 +38,9 @@ static const unsigned long kvm_isa_ext_arr[] = { 
	KVM_ISA_EXT_ARR(SVINVAL),

	KVM_ISA_EXT_ARR(SVNAPOT),

	KVM_ISA_EXT_ARR(SVPBMT),

	KVM_ISA_EXT_ARR(ZBA),

	KVM_ISA_EXT_ARR(ZBB),

	KVM_ISA_EXT_ARR(ZBS),

	KVM_ISA_EXT_ARR(ZIHINTPAUSE),

	KVM_ISA_EXT_ARR(ZICBOM),

	KVM_ISA_EXT_ARR(ZICBOZ),
@@ -82,7 +84,9 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) 
	case KVM_RISCV_ISA_EXT_SVINVAL:

	case KVM_RISCV_ISA_EXT_SVNAPOT:

	case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:

	case KVM_RISCV_ISA_EXT_ZBA:

	case KVM_RISCV_ISA_EXT_ZBB:

	case KVM_RISCV_ISA_EXT_ZBS:

		return false;

	default:

		break;