Commit 41410965 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull pci fix from Bjorn Helgaas:
 "Revert the attempt to distribute spare resources to unconfigured
  hotplug bridges at boot time.

  This fixed some dock hot-add scenarios, but Jonathan Cameron reported
  that it broke a topology with a multi-function device where one
  function was a Switch Upstream Port and the other was an Endpoint"

* tag 'pci-v6.1-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  Revert "PCI: Distribute available resources for root buses, too"
parents 19d17ab7 5632e2be
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+1 −61
Original line number Diff line number Diff line
@@ -1768,9 +1768,6 @@ static void adjust_bridge_window(struct pci_dev *bridge, struct resource *res,
	}

	res->end = res->start + new_size - 1;

	/* If the resource is part of the add_list remove it now */
	if (add_list)
	remove_from_list(add_list, res);
}

@@ -1926,8 +1923,6 @@ static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
	if (!bridge->is_hotplug_bridge)
		return;

	pci_dbg(bridge, "distributing available resources\n");

	/* Take the initial extra resources from the hotplug port */
	available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW];
	available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW];
@@ -1939,59 +1934,6 @@ static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
					       available_mmio_pref);
}

static bool pci_bridge_resources_not_assigned(struct pci_dev *dev)
{
	const struct resource *r;

	/*
	 * Check the child device's resources and if they are not yet
	 * assigned it means we are configuring them (not the boot
	 * firmware) so we should be able to extend the upstream
	 * bridge's (that's the hotplug downstream PCIe port) resources
	 * in the same way we do with the normal hotplug case.
	 */
	r = &dev->resource[PCI_BRIDGE_IO_WINDOW];
	if (!r->flags || !(r->flags & IORESOURCE_STARTALIGN))
		return false;
	r = &dev->resource[PCI_BRIDGE_MEM_WINDOW];
	if (!r->flags || !(r->flags & IORESOURCE_STARTALIGN))
		return false;
	r = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
	if (!r->flags || !(r->flags & IORESOURCE_STARTALIGN))
		return false;

	return true;
}

static void pci_root_bus_distribute_available_resources(struct pci_bus *bus,
							struct list_head *add_list)
{
	struct pci_dev *dev, *bridge = bus->self;

	for_each_pci_bridge(dev, bus) {
		struct pci_bus *b;

		b = dev->subordinate;
		if (!b)
			continue;

		/*
		 * Need to check "bridge" here too because it is NULL
		 * in case of root bus.
		 */
		if (bridge && pci_bridge_resources_not_assigned(dev)) {
			pci_bridge_distribute_available_resources(bridge, add_list);
			/*
			 * There is only PCIe upstream port on the bus
			 * so we don't need to go futher.
			 */
			return;
		}

		pci_root_bus_distribute_available_resources(b, add_list);
	}
}

/*
 * First try will not touch PCI bridge res.
 * Second and later try will clear small leaf bridge res.
@@ -2031,8 +1973,6 @@ void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
	 */
	__pci_bus_size_bridges(bus, add_list);

	pci_root_bus_distribute_available_resources(bus, add_list);

	/* Depth last, allocate resources and update the hardware. */
	__pci_bus_assign_resources(bus, add_list, &fail_head);
	if (add_list)