Commit 4115af49 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge tag 'irqchip-fixes-6.4-1' of... 

Merge tag 'irqchip-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent

Pull irqchip fixes from Marc Zyngier:

  - MIPS GIC fixes for issues that could result in either
    loss of state in the interrupt controller, or a deadlock

  - Workaround for Mediatek Chromebooks that only save/restore
    partial state when turning the GIC redistributors off,
    resulting if fireworks if Linux uses interrupt priorities
    for pseudo-NMIs

  - Fix the MBIGEN error handling on init

  - Mark meson-gpio OF data structures as __maybe_unused,
    avoiding compilation warnings on non-OF setups

Link: https://lore.kernel.org/lkml/20230521101812.2520740-1-maz@kernel.org
parents 44c026a7 cddb536a

Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml

+6 −0
Original line number Diff line number Diff line
@@ -166,6 +166,12 @@ properties: 
  resets:

    maxItems: 1



  mediatek,broken-save-restore-fw:

    type: boolean

    description:

      Asserts that the firmware on this device has issues saving and restoring

      GICR registers when the GIC redistributors are powered off.



dependencies:

  mbi-ranges: [ msi-controller ]

  msi-controller: [ mbi-ranges ]

drivers/irqchip/irq-gic-common.c

+6 −2
Original line number Diff line number Diff line
@@ -16,7 +16,11 @@ void gic_enable_of_quirks(const struct device_node *np, 
			  const struct gic_quirk *quirks, void *data)

{

	for (; quirks->desc; quirks++) {

		if (!of_device_is_compatible(np, quirks->compatible))

		if (quirks->compatible &&

		    !of_device_is_compatible(np, quirks->compatible))

			continue;

		if (quirks->property &&

		    !of_property_read_bool(np, quirks->property))

			continue;

		if (quirks->init(data))

			pr_info("GIC: enabling workaround for %s\n",
@@ -28,7 +32,7 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, 
		void *data)

{

	for (; quirks->desc; quirks++) {

		if (quirks->compatible)

		if (quirks->compatible || quirks->property)

			continue;

		if (quirks->iidr != (quirks->mask & iidr))

			continue;

drivers/irqchip/irq-gic-common.h

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
struct gic_quirk {

	const char *desc;

	const char *compatible;

	const char *property;

	bool (*init)(void *data);

	u32 iidr;

	u32 mask;

drivers/irqchip/irq-gic-v3.c

+20 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ 


#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996	(1ULL << 0)

#define FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539	(1ULL << 1)

#define FLAGS_WORKAROUND_MTK_GICR_SAVE		(1ULL << 2)



#define GIC_IRQ_TYPE_PARTITION	(GIC_IRQ_TYPE_LPI + 1)
@@ -1720,6 +1721,15 @@ static bool gic_enable_quirk_msm8996(void *data) 
	return true;

}



static bool gic_enable_quirk_mtk_gicr(void *data)

{

	struct gic_chip_data *d = data;



	d->flags |= FLAGS_WORKAROUND_MTK_GICR_SAVE;



	return true;

}



static bool gic_enable_quirk_cavium_38539(void *data)

{

	struct gic_chip_data *d = data;
@@ -1792,6 +1802,11 @@ static const struct gic_quirk gic_quirks[] = { 
		.compatible = "qcom,msm8996-gic-v3",

		.init	= gic_enable_quirk_msm8996,

	},

	{

		.desc	= "GICv3: Mediatek Chromebook GICR save problem",

		.property = "mediatek,broken-save-restore-fw",

		.init	= gic_enable_quirk_mtk_gicr,

	},

	{

		.desc	= "GICv3: HIP06 erratum 161010803",

		.iidr	= 0x0204043b,
@@ -1834,6 +1849,11 @@ static void gic_enable_nmi_support(void) 
	if (!gic_prio_masking_enabled())

		return;



	if (gic_data.flags & FLAGS_WORKAROUND_MTK_GICR_SAVE) {

		pr_warn("Skipping NMI enable due to firmware issues\n");

		return;

	}



	ppi_nmi_refs = kcalloc(gic_data.ppi_nr, sizeof(*ppi_nmi_refs), GFP_KERNEL);

	if (!ppi_nmi_refs)

		return;

drivers/irqchip/irq-mbigen.c

+18 −13
Original line number Diff line number Diff line
@@ -240,26 +240,27 @@ static int mbigen_of_create_domain(struct platform_device *pdev, 
	struct irq_domain *domain;

	struct device_node *np;

	u32 num_pins;

	int ret = 0;



	parent = bus_get_dev_root(&platform_bus_type);

	if (!parent)

		return -ENODEV;



	for_each_child_of_node(pdev->dev.of_node, np) {

		if (!of_property_read_bool(np, "interrupt-controller"))

			continue;



		parent = bus_get_dev_root(&platform_bus_type);

		if (parent) {

		child = of_platform_device_create(np, NULL, parent);

			put_device(parent);

		if (!child) {

				of_node_put(np);

				return -ENOMEM;

			}

			ret = -ENOMEM;

			break;

		}



		if (of_property_read_u32(child->dev.of_node, "num-pins",

					 &num_pins) < 0) {

			dev_err(&pdev->dev, "No num-pins property\n");

			of_node_put(np);

			return -EINVAL;

			ret = -EINVAL;

			break;

		}



		domain = platform_msi_create_device_domain(&child->dev, num_pins,
@@ -267,12 +268,16 @@ static int mbigen_of_create_domain(struct platform_device *pdev, 
							   &mbigen_domain_ops,

							   mgn_chip);

		if (!domain) {

			of_node_put(np);

			return -ENOMEM;

			ret = -ENOMEM;

			break;

		}

	}



	return 0;

	put_device(parent);

	if (ret)

		of_node_put(np);



	return ret;

}



#ifdef CONFIG_ACPI