Commit 40c565a4 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branches 'pm-cpufreq' and 'pm-cpuidle' 

Merge CPU power management updates for 6.5-rc1:

 - Add missing __init annotation to one function in the intel_idle
   drvier (Rafael Wysocki).

 - Make intel_pstate use a correct scaling factor when mapping HWP
   performance levels to frequency values on hybrid-capable systems
   with disabled E-cores (Srinivas Pandruvada).

 - Fix Kconfig dependencies of the cpufreq-dt-platform driver (Viresh
   Kumar).

 - Add support to build cpufreq-dt-platdev as a module (Zhipeng Wang).

 - Don't allocate Sparc's cpufreq_driver dynamically (Viresh Kumar).

 - Add support for TI's AM62A7 platform (Vibhore Vardhan).

 - Add support for Armada's ap807 platform (Russell King (Oracle)).

 - Add support for StarFive JH7110 SoC (Mason Huo).

 - Fix voltage selection for Mediatek Socs (Daniel Golle).

 - Fix error handling in Tegra's cpufreq driver (Christophe JAILLET).

 - Document Qualcomm's IPQ8074 in DT bindings (Robert Marko).

 - Don't warn for disabling a non-existing frequency for imx6q cpufreq
   driver (Christoph Niedermaier).

 - Use dev_err_probe() in Qualcomm's cpufreq driver (Andrew Halaney).

* pm-cpufreq:
  cpufreq: intel_pstate: Fix scaling for hybrid-capable systems with disabled E-cores
  cpufreq: Make CONFIG_CPUFREQ_DT_PLATDEV depend on OF
  cpufreq: qcom-cpufreq-hw: Use dev_err_probe() when failing to get icc paths
  cpufreq: mediatek: correct voltages for MT7622 and MT7623
  cpufreq: armada-8k: add ap807 support
  cpufreq: dt-platdev: Support building as module
  dt-bindings: cpufreq: qcom-cpufreq-nvmem: document IPQ8074
  cpufreq: dt-platdev: Blacklist ti,am62a7 SoC
  cpufreq: ti-cpufreq: Add support for AM62A7
  cpufreq: imx6q: don't warn for disabling a non-existing frequency
  cpufreq: sparc: Don't allocate cpufreq_driver dynamically
  cpufreq: tegra194: Fix an error handling path in tegra194_cpufreq_probe()
  cpufreq: dt-platdev: Add JH7110 SOC to the allowlist

* pm-cpuidle:
  intel_idle: Add __init annotation to matchup_vm_state_with_baremetal()
parents bb814518 0fcfc9e5 b2918089

Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml

+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ select: 
          - qcom,apq8064

          - qcom,apq8096

          - qcom,ipq8064

          - qcom,ipq8074

          - qcom,msm8939

          - qcom,msm8960

          - qcom,msm8974

drivers/cpufreq/Kconfig

+2 −1
Original line number Diff line number Diff line
@@ -218,7 +218,8 @@ config CPUFREQ_DT 
	  If in doubt, say N.



config CPUFREQ_DT_PLATDEV

	bool

	tristate "Generic DT based cpufreq platdev driver"

	depends on OF

	help

	  This adds a generic DT based cpufreq platdev driver for frequency

	  management.  This creates a 'cpufreq-dt' platform device, on the

drivers/cpufreq/armada-8k-cpufreq.c

+9 −7
Original line number Diff line number Diff line
@@ -21,6 +21,13 @@ 
#include <linux/pm_opp.h>

#include <linux/slab.h>



static const struct of_device_id __maybe_unused armada_8k_cpufreq_of_match[] = {

	{ .compatible = "marvell,ap806-cpu-clock" },

	{ .compatible = "marvell,ap807-cpu-clock" },

	{ },

};

MODULE_DEVICE_TABLE(of, armada_8k_cpufreq_of_match);



/*

 * Setup the opps list with the divider for the max frequency, that

 * will be filled at runtime.
@@ -127,7 +134,8 @@ static int __init armada_8k_cpufreq_init(void) 
	struct device_node *node;

	struct cpumask cpus;



	node = of_find_compatible_node(NULL, NULL, "marvell,ap806-cpu-clock");

	node = of_find_matching_node_and_match(NULL, armada_8k_cpufreq_of_match,

					       NULL);

	if (!node || !of_device_is_available(node)) {

		of_node_put(node);

		return -ENODEV;
@@ -204,12 +212,6 @@ static void __exit armada_8k_cpufreq_exit(void) 
}

module_exit(armada_8k_cpufreq_exit);



static const struct of_device_id __maybe_unused armada_8k_cpufreq_of_match[] = {

	{ .compatible = "marvell,ap806-cpu-clock" },

	{ },

};

MODULE_DEVICE_TABLE(of, armada_8k_cpufreq_of_match);



MODULE_AUTHOR("Gregory Clement <gregory.clement@bootlin.com>");

MODULE_DESCRIPTION("Armada 8K cpufreq driver");

MODULE_LICENSE("GPL");

drivers/cpufreq/cpufreq-dt-platdev.c

+5 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
 */



#include <linux/err.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/platform_device.h>
@@ -85,6 +86,8 @@ static const struct of_device_id allowlist[] __initconst = { 
	{ .compatible = "st-ericsson,u9500", },

	{ .compatible = "st-ericsson,u9540", },



	{ .compatible = "starfive,jh7110", },



	{ .compatible = "ti,omap2", },

	{ .compatible = "ti,omap4", },

	{ .compatible = "ti,omap5", },
@@ -165,6 +168,7 @@ static const struct of_device_id blocklist[] __initconst = { 
	{ .compatible = "ti,dra7", },

	{ .compatible = "ti,omap3", },

	{ .compatible = "ti,am625", },

	{ .compatible = "ti,am62a7", },



	{ .compatible = "qcom,ipq8064", },

	{ .compatible = "qcom,apq8064", },
@@ -214,3 +218,4 @@ static int __init cpufreq_dt_platdev_init(void) 
			       sizeof(struct cpufreq_dt_platform_data)));

}

core_initcall(cpufreq_dt_platdev_init);

MODULE_LICENSE("GPL");

drivers/cpufreq/imx6q-cpufreq.c

+16 −14
Original line number Diff line number Diff line
@@ -209,6 +209,14 @@ static struct cpufreq_driver imx6q_cpufreq_driver = { 
	.suspend = cpufreq_generic_suspend,

};



static void imx6x_disable_freq_in_opp(struct device *dev, unsigned long freq)

{

	int ret = dev_pm_opp_disable(dev, freq);



	if (ret < 0 && ret != -ENODEV)

		dev_warn(dev, "failed to disable %ldMHz OPP\n", freq / 1000000);

}



#define OCOTP_CFG3			0x440

#define OCOTP_CFG3_SPEED_SHIFT		16

#define OCOTP_CFG3_SPEED_1P2GHZ		0x3
@@ -254,17 +262,15 @@ static int imx6q_opp_check_speed_grading(struct device *dev) 
	val &= 0x3;



	if (val < OCOTP_CFG3_SPEED_996MHZ)

		if (dev_pm_opp_disable(dev, 996000000))

			dev_warn(dev, "failed to disable 996MHz OPP\n");

		imx6x_disable_freq_in_opp(dev, 996000000);



	if (of_machine_is_compatible("fsl,imx6q") ||

	    of_machine_is_compatible("fsl,imx6qp")) {

		if (val != OCOTP_CFG3_SPEED_852MHZ)

			if (dev_pm_opp_disable(dev, 852000000))

				dev_warn(dev, "failed to disable 852MHz OPP\n");

			imx6x_disable_freq_in_opp(dev, 852000000);



		if (val != OCOTP_CFG3_SPEED_1P2GHZ)

			if (dev_pm_opp_disable(dev, 1200000000))

				dev_warn(dev, "failed to disable 1.2GHz OPP\n");

			imx6x_disable_freq_in_opp(dev, 1200000000);

	}



	return 0;
@@ -316,20 +322,16 @@ static int imx6ul_opp_check_speed_grading(struct device *dev) 
	val >>= OCOTP_CFG3_SPEED_SHIFT;

	val &= 0x3;



	if (of_machine_is_compatible("fsl,imx6ul")) {

	if (of_machine_is_compatible("fsl,imx6ul"))

		if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)

			if (dev_pm_opp_disable(dev, 696000000))

				dev_warn(dev, "failed to disable 696MHz OPP\n");

	}

			imx6x_disable_freq_in_opp(dev, 696000000);



	if (of_machine_is_compatible("fsl,imx6ull")) {

		if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)

			if (dev_pm_opp_disable(dev, 792000000))

				dev_warn(dev, "failed to disable 792MHz OPP\n");

			imx6x_disable_freq_in_opp(dev, 792000000);



		if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)

			if (dev_pm_opp_disable(dev, 900000000))

				dev_warn(dev, "failed to disable 900MHz OPP\n");

			imx6x_disable_freq_in_opp(dev, 900000000);

	}



	return ret;