Commit 40bb9133 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'zynqmp-dt-for-v5.13' of https://github.com/Xilinx/linux-xlnx into arm/dt

arm64: dts: ZynqMP DT changes for v5.13

- Add power-domains for DP
- Remove si5328 node without compatible string

* tag 'zynqmp-dt-for-v5.13' of https://github.com/Xilinx/linux-xlnx:
  arm64: dts: zynqmp: Remove si5328 device nodes
  arm64: dts: zynqmp: Add power domain for the DisplayPort DMA controller

Link: https://lore.kernel.org/r/e422fa9c-3e58-28b4-f6f0-65aa44254131@xilinx.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents f00a99a7 73d677e9
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+1 −19
Original line number Diff line number Diff line
@@ -580,25 +580,7 @@
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <4>;
			si5328: clock-generator@69 {/* SI5328 - u20 */
				reg = <0x69>;
				/*
				 * Chip has interrupt present connected to PL
				 * interrupt-parent = <&>;
				 * interrupts = <>;
				 */
				#address-cells = <1>;
				#size-cells = <0>;
				#clock-cells = <1>;
				clocks = <&refhdmi>;
				clock-names = "xtal";
				clock-output-names = "si5328";

				si5328_clk: clk0@0 {
					reg = <0>;
					clock-frequency = <27000000>;
				};
			};
			/* SI5328 - u20 */
		};
		/* 5 - 7 unconnected */
	};
+1 −19
Original line number Diff line number Diff line
@@ -581,25 +581,7 @@
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <4>;
			si5328: clock-generator@69 {/* SI5328 - u20 */
				reg = <0x69>;
				/*
				 * Chip has interrupt present connected to PL
				 * interrupt-parent = <&>;
				 * interrupts = <>;
				 */
				#address-cells = <1>;
				#size-cells = <0>;
				#clock-cells = <1>;
				clocks = <&refhdmi>;
				clock-names = "xtal";
				clock-output-names = "si5328";

				si5328_clk: clk0@0 {
					reg = <0>;
					clock-frequency = <27000000>;
				};
			};
			/* SI5328 - u20 */
		};
		i2c@5 {
			#address-cells = <1>;
+1 −0
Original line number Diff line number Diff line
@@ -856,6 +856,7 @@
			interrupts = <0 122 4>;
			interrupt-parent = <&gic>;
			clock-names = "axi_clk";
			power-domains = <&zynqmp_firmware PD_DP>;
			#dma-cells = <1>;
		};