Commit 406171bf authored by Sagar Kadam's avatar Sagar Kadam Committed by Rob Herring
Browse files

dt-bindings: fu540: prci: convert PRCI bindings to json-schema 



FU540-C000 SoC from SiFive has a PRCI block, here we convert
the device tree bindings from txt to YAML.

Signed-off-by: default avatarSagar Kadam <sagar.kadam@sifive.com>
Link: https://lore.kernel.org/r/1601393531-2402-2-git-send-email-sagar.kadam@sifive.com


Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 36705c6f

Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt

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SiFive FU540 PRCI bindings



On the FU540 family of SoCs, most system-wide clock and reset integration

is via the PRCI IP block.



Required properties:

- compatible: Should be "sifive,<chip>-prci".  Only one value is

	supported: "sifive,fu540-c000-prci"

- reg: Should describe the PRCI's register target physical address region

- clocks: Should point to the hfclk device tree node and the rtcclk

          device tree node.  The RTC clock here is not a time-of-day clock,

	  but is instead a high-stability clock source for system timers

	  and cycle counters.

- #clock-cells: Should be <1>



The clock consumer should specify the desired clock via the clock ID

macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.

These macros begin with PRCI_CLK_.



The hfclk and rtcclk nodes are required, and represent physical

crystals or resonators located on the PCB.  These nodes should be present

underneath /, rather than /soc.



Examples:



/* under /, in PCB-specific DT data */

hfclk: hfclk {

	#clock-cells = <0>;

	compatible = "fixed-clock";

	clock-frequency = <33333333>;

	clock-output-names = "hfclk";

};

rtcclk: rtcclk {

	#clock-cells = <0>;

	compatible = "fixed-clock";

	clock-frequency = <1000000>;

	clock-output-names = "rtcclk";

};



/* under /soc, in SoC-specific DT data */

prci: clock-controller@10000000 {

	compatible = "sifive,fu540-c000-prci";

	reg = <0x0 0x10000000 0x0 0x1000>;

	clocks = <&hfclk>, <&rtcclk>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) 2020 SiFive, Inc.

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)



maintainers:

  - Sagar Kadam <sagar.kadam@sifive.com>

  - Paul Walmsley  <paul.walmsley@sifive.com>



description:

  On the FU540 family of SoCs, most system-wide clock and reset integration

  is via the PRCI IP block.

  The clock consumer should specify the desired clock via the clock ID

  macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.

  These macros begin with PRCI_CLK_.



  The hfclk and rtcclk nodes are required, and represent physical

  crystals or resonators located on the PCB.  These nodes should be present

  underneath /, rather than /soc.



properties:

  compatible:

    const: sifive,fu540-c000-prci



  reg:

    maxItems: 1



  clocks:

    items:

      - description: high frequency clock.

      - description: RTL clock.



  clock-names:

    items:

      - const: hfclk

      - const: rtcclk



  "#clock-cells":

    const: 1



required:

  - compatible

  - reg

  - clocks

  - "#clock-cells"



additionalProperties: false



examples:

  - |

    prci: clock-controller@10000000 {

      compatible = "sifive,fu540-c000-prci";

      reg = <0x10000000 0x1000>;

      clocks = <&hfclk>, <&rtcclk>;

      #clock-cells = <1>;

    };