Commit 405386b0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull kvm fixes from Paolo Bonzini:

 - Allow again loading KVM on 32-bit non-PAE builds

 - Fixes for host SMIs on AMD

 - Fixes for guest SMIs on AMD

 - Fixes for selftests on s390 and ARM

 - Fix memory leak

 - Enforce no-instrumentation area on vmentry when hardware breakpoints
   are in use.

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (25 commits)
  KVM: selftests: smm_test: Test SMM enter from L2
  KVM: nSVM: Restore nested control upon leaving SMM
  KVM: nSVM: Fix L1 state corruption upon return from SMM
  KVM: nSVM: Introduce svm_copy_vmrun_state()
  KVM: nSVM: Check that VM_HSAVE_PA MSR was set before VMRUN
  KVM: nSVM: Check the value written to MSR_VM_HSAVE_PA
  KVM: SVM: Fix sev_pin_memory() error checks in SEV migration utilities
  KVM: SVM: Return -EFAULT if copy_to_user() for SEV mig packet header fails
  KVM: SVM: add module param to control the #SMI interception
  KVM: SVM: remove INIT intercept handler
  KVM: SVM: #SMI interception must not skip the instruction
  KVM: VMX: Remove vmx_msr_index from vmx.h
  KVM: X86: Disable hardware breakpoints unconditionally before kvm_x86->run()
  KVM: selftests: Address extra memslot parameters in vm_vaddr_alloc
  kvm: debugfs: fix memory leak in kvm_create_vm_debugfs
  KVM: x86/pmu: Clear anythread deprecated bit when 0xa leaf is unsupported on the SVM
  KVM: mmio: Fix use-after-free Read in kvm_vm_ioctl_unregister_coalesced_mmio
  KVM: SVM: Revert clearing of C-bit on GPA in #NPF handler
  KVM: x86/mmu: Do not apply HPA (memory encryption) mask to GPAs
  KVM: x86: Use kernel's x86_phys_bits to handle reduced MAXPHYADDR
  ...
parents f3523a22 d951b221

arch/x86/kvm/cpuid.c

+25 −5
Original line number Diff line number Diff line
@@ -765,6 +765,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) 


		edx.split.num_counters_fixed = min(cap.num_counters_fixed, MAX_FIXED_COUNTERS);

		edx.split.bit_width_fixed = cap.bit_width_fixed;

		if (cap.version)

			edx.split.anythread_deprecated = 1;

		edx.split.reserved1 = 0;

		edx.split.reserved2 = 0;
@@ -940,8 +941,21 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) 
		unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);

		unsigned phys_as = entry->eax & 0xff;



		if (!g_phys_as)

		/*

		 * If TDP (NPT) is disabled use the adjusted host MAXPHYADDR as

		 * the guest operates in the same PA space as the host, i.e.

		 * reductions in MAXPHYADDR for memory encryption affect shadow

		 * paging, too.

		 *

		 * If TDP is enabled but an explicit guest MAXPHYADDR is not

		 * provided, use the raw bare metal MAXPHYADDR as reductions to

		 * the HPAs do not affect GPAs.

		 */

		if (!tdp_enabled)

			g_phys_as = boot_cpu_data.x86_phys_bits;

		else if (!g_phys_as)

			g_phys_as = phys_as;



		entry->eax = g_phys_as | (virt_as << 8);

		entry->edx = 0;

		cpuid_entry_override(entry, CPUID_8000_0008_EBX);
@@ -964,12 +978,18 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) 
	case 0x8000001a:

	case 0x8000001e:

		break;

	/* Support memory encryption cpuid if host supports it */

	case 0x8000001F:

		if (!kvm_cpu_cap_has(X86_FEATURE_SEV))

		if (!kvm_cpu_cap_has(X86_FEATURE_SEV)) {

			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;

		else

		} else {

			cpuid_entry_override(entry, CPUID_8000_001F_EAX);



			/*

			 * Enumerate '0' for "PA bits reduction", the adjusted

			 * MAXPHYADDR is enumerated directly (see 0x80000008).

			 */

			entry->ebx &= ~GENMASK(11, 6);

		}

		break;

	/*Add support for Centaur's CPUID instruction*/

	case 0xC0000000:

arch/x86/kvm/mmu/mmu.c

+2 −0
Original line number Diff line number Diff line
@@ -53,6 +53,8 @@ 
#include <asm/kvm_page_track.h>

#include "trace.h"



#include "paging.h"



extern bool itlb_multihit_kvm_mitigation;



int __read_mostly nx_huge_pages = -1;

arch/x86/kvm/mmu/paging.h

0 → 100644
+14 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/* Shadow paging constants/helpers that don't need to be #undef'd. */

#ifndef __KVM_X86_PAGING_H

#define __KVM_X86_PAGING_H



#define GUEST_PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))

#define PT64_LVL_ADDR_MASK(level) \

	(GUEST_PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \

						* PT64_LEVEL_BITS))) - 1))

#define PT64_LVL_OFFSET_MASK(level) \

	(GUEST_PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \

						* PT64_LEVEL_BITS))) - 1))

#endif /* __KVM_X86_PAGING_H */

arch/x86/kvm/mmu/paging_tmpl.h

+2 −2
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ 
	#define pt_element_t u64

	#define guest_walker guest_walker64

	#define FNAME(name) paging##64_##name

	#define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK

	#define PT_BASE_ADDR_MASK GUEST_PT64_BASE_ADDR_MASK

	#define PT_LVL_ADDR_MASK(lvl) PT64_LVL_ADDR_MASK(lvl)

	#define PT_LVL_OFFSET_MASK(lvl) PT64_LVL_OFFSET_MASK(lvl)

	#define PT_INDEX(addr, level) PT64_INDEX(addr, level)
@@ -57,7 +57,7 @@ 
	#define pt_element_t u64

	#define guest_walker guest_walkerEPT

	#define FNAME(name) ept_##name

	#define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK

	#define PT_BASE_ADDR_MASK GUEST_PT64_BASE_ADDR_MASK

	#define PT_LVL_ADDR_MASK(lvl) PT64_LVL_ADDR_MASK(lvl)

	#define PT_LVL_OFFSET_MASK(lvl) PT64_LVL_OFFSET_MASK(lvl)

	#define PT_INDEX(addr, level) PT64_INDEX(addr, level)

arch/x86/kvm/mmu/spte.h

+0 −6
Original line number Diff line number Diff line
@@ -38,12 +38,6 @@ static_assert(SPTE_TDP_AD_ENABLED_MASK == 0); 
#else

#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))

#endif

#define PT64_LVL_ADDR_MASK(level) \

	(PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \

						* PT64_LEVEL_BITS))) - 1))

#define PT64_LVL_OFFSET_MASK(level) \

	(PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \

						* PT64_LEVEL_BITS))) - 1))



#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \

			| shadow_x_mask | shadow_nx_mask | shadow_me_mask)