Loading Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt +2 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,8 @@ devices. Required Properties: - compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D - compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D, "amlogic,g12a-audio-clkc" for G12A. - reg : physical base address of the clock controller and length of memory mapped region. - clocks : a list of phandle + clock-specifier pairs for the clocks listed Loading include/dt-bindings/clock/axg-audio-clkc.h +10 −0 Original line number Diff line number Diff line Loading @@ -70,5 +70,15 @@ #define AUD_CLKID_TDMOUT_A_LRCLK 134 #define AUD_CLKID_TDMOUT_B_LRCLK 135 #define AUD_CLKID_TDMOUT_C_LRCLK 136 #define AUD_CLKID_SPDIFOUT_B 151 #define AUD_CLKID_SPDIFOUT_B_CLK 152 #define AUD_CLKID_TDM_MCLK_PAD0 155 #define AUD_CLKID_TDM_MCLK_PAD1 156 #define AUD_CLKID_TDM_LRCLK_PAD0 157 #define AUD_CLKID_TDM_LRCLK_PAD1 158 #define AUD_CLKID_TDM_LRCLK_PAD2 159 #define AUD_CLKID_TDM_SCLK_PAD0 160 #define AUD_CLKID_TDM_SCLK_PAD1 161 #define AUD_CLKID_TDM_SCLK_PAD2 162 #endif /* __AXG_AUDIO_CLKC_BINDINGS_H */ Loading
Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt +2 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,8 @@ devices. Required Properties: - compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D - compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D, "amlogic,g12a-audio-clkc" for G12A. - reg : physical base address of the clock controller and length of memory mapped region. - clocks : a list of phandle + clock-specifier pairs for the clocks listed Loading
include/dt-bindings/clock/axg-audio-clkc.h +10 −0 Original line number Diff line number Diff line Loading @@ -70,5 +70,15 @@ #define AUD_CLKID_TDMOUT_A_LRCLK 134 #define AUD_CLKID_TDMOUT_B_LRCLK 135 #define AUD_CLKID_TDMOUT_C_LRCLK 136 #define AUD_CLKID_SPDIFOUT_B 151 #define AUD_CLKID_SPDIFOUT_B_CLK 152 #define AUD_CLKID_TDM_MCLK_PAD0 155 #define AUD_CLKID_TDM_MCLK_PAD1 156 #define AUD_CLKID_TDM_LRCLK_PAD0 157 #define AUD_CLKID_TDM_LRCLK_PAD1 158 #define AUD_CLKID_TDM_LRCLK_PAD2 159 #define AUD_CLKID_TDM_SCLK_PAD0 160 #define AUD_CLKID_TDM_SCLK_PAD1 161 #define AUD_CLKID_TDM_SCLK_PAD2 162 #endif /* __AXG_AUDIO_CLKC_BINDINGS_H */