Commit 4028988e authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Reuse intel_adjusted_rate() for pfit pixel rate adjustment



Replace the hand rolled pfit downscale calculations with
intel_adjusted_rate().

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210330184254.6290-2-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent b876e79d
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+3 −3
Original line number Diff line number Diff line
@@ -133,7 +133,7 @@ intel_plane_destroy_state(struct drm_plane *plane,
	kfree(plane_state);
}

static unsigned int intel_adjusted_rate(const struct drm_rect *src,
unsigned int intel_adjusted_rate(const struct drm_rect *src,
				 const struct drm_rect *dst,
				 unsigned int rate)
{
+4 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@

struct drm_plane;
struct drm_property;
struct drm_rect;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
@@ -18,6 +19,9 @@ struct intel_plane_state;

extern const struct drm_plane_helper_funcs intel_plane_helper_funcs;

unsigned int intel_adjusted_rate(const struct drm_rect *src,
				 const struct drm_rect *dst,
				 unsigned int rate);
unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
				    const struct intel_plane_state *plane_state);

+6 −17
Original line number Diff line number Diff line
@@ -3984,7 +3984,7 @@ static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc)
static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
{
	u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock;
	unsigned int pipe_w, pipe_h, pfit_w, pfit_h;
	struct drm_rect src;

	/*
	 * We only use IF-ID interlacing. If we ever use
@@ -3994,23 +3994,12 @@ static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
	if (!crtc_state->pch_pfit.enabled)
		return pixel_rate;

	pipe_w = crtc_state->pipe_src_w;
	pipe_h = crtc_state->pipe_src_h;
	drm_rect_init(&src, 0, 0,
		      crtc_state->pipe_src_w << 16,
		      crtc_state->pipe_src_h << 16);

	pfit_w = drm_rect_width(&crtc_state->pch_pfit.dst);
	pfit_h = drm_rect_height(&crtc_state->pch_pfit.dst);

	if (pipe_w < pfit_w)
		pipe_w = pfit_w;
	if (pipe_h < pfit_h)
		pipe_h = pfit_h;

	if (drm_WARN_ON(crtc_state->uapi.crtc->dev,
			!pfit_w || !pfit_h))
		return pixel_rate;

	return div_u64(mul_u32_u32(pixel_rate, pipe_w * pipe_h),
		       pfit_w * pfit_h);
	return intel_adjusted_rate(&src, &crtc_state->pch_pfit.dst,
				   pixel_rate);
}

static void intel_mode_from_crtc_timings(struct drm_display_mode *mode,