Commit 402230cb authored by Sherry Wang's avatar Sherry Wang Committed by Zheng Zengkai
Browse files

drm/amd/display: refactor ILR to make it work 

stable inclusion
from stable-v6.6.5
commit 5e03e4a4911d9f9aaa49b5b3f9f02fa13dd1078a
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8N21P

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=5e03e4a4911d9f9aaa49b5b3f9f02fa13dd1078a



--------------------------------

[ Upstream commit 6ec876472ff7edeaf2a07bf6afbff74d7f1dfa35 ]

[Why]
Current ILR toggle is on/off as a part of panel
config for new function, which breaks original
ILR logic

[How]
Refactor ILR and take panel config into account

Reviewed-by: default avatarAnthony Koo <anthony.koo@amd.com>
Acked-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarSherry Wang <yao.wang1@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Stable-dep-of: d9e865826c20 ("drm/amd/display: Simplify brightness initialization")
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent 33895718

drivers/gpu/drm/amd/display/dc/link/link_detection.c

+6 −0
Original line number Diff line number Diff line
@@ -1166,6 +1166,12 @@ static bool detect_link_and_local_sink(struct dc_link *link, 
			dm_helpers_init_panel_settings(dc_ctx, &link->panel_config, sink);

			// Override dc_panel_config if system has specific settings

			dm_helpers_override_panel_settings(dc_ctx, &link->panel_config);



			//sink only can use supported link rate table, we are foreced to enable it

			if (link->reported_link_cap.link_rate == LINK_RATE_UNKNOWN)

				link->panel_config.ilr.optimize_edp_link_rate = true;

			if (edp_is_ilr_optimization_enabled(link))

				link->reported_link_cap.link_rate = get_max_link_rate_from_ilr_table(link);

		}



	} else {

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

+4 −10
Original line number Diff line number Diff line
@@ -707,8 +707,7 @@ bool edp_decide_link_settings(struct dc_link *link, 
	 * edp_supported_link_rates_count is only valid for eDP v1.4 or higher.

	 * Per VESA eDP spec, "The DPCD revision for eDP v1.4 is 13h"

	 */

	if (link->dpcd_caps.dpcd_rev.raw < DPCD_REV_13 ||

			link->dpcd_caps.edp_supported_link_rates_count == 0) {

	if (!edp_is_ilr_optimization_enabled(link)) {

		*link_setting = link->verified_link_cap;

		return true;

	}
@@ -772,8 +771,7 @@ bool decide_edp_link_settings_with_dsc(struct dc_link *link, 
	 * edp_supported_link_rates_count is only valid for eDP v1.4 or higher.

	 * Per VESA eDP spec, "The DPCD revision for eDP v1.4 is 13h"

	 */

	if ((link->dpcd_caps.dpcd_rev.raw < DPCD_REV_13 ||

			link->dpcd_caps.edp_supported_link_rates_count == 0)) {

	if (!edp_is_ilr_optimization_enabled(link)) {

		/* for DSC enabled case, we search for minimum lane count */

		memset(&initial_link_setting, 0, sizeof(initial_link_setting));

		initial_link_setting.lane_count = LANE_COUNT_ONE;
@@ -1938,9 +1936,7 @@ void detect_edp_sink_caps(struct dc_link *link) 
	 * edp_supported_link_rates_count is only valid for eDP v1.4 or higher.

	 * Per VESA eDP spec, "The DPCD revision for eDP v1.4 is 13h"

	 */

	if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_13 &&

			(link->panel_config.ilr.optimize_edp_link_rate ||

			link->reported_link_cap.link_rate == LINK_RATE_UNKNOWN)) {

	if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_13) {

		// Read DPCD 00010h - 0001Fh 16 bytes at one shot

		core_link_read_dpcd(link, DP_SUPPORTED_LINK_RATES,

							supported_link_rates, sizeof(supported_link_rates));
@@ -1958,12 +1954,10 @@ void detect_edp_sink_caps(struct dc_link *link) 
				link_rate = linkRateInKHzToLinkRateMultiplier(link_rate_in_khz);

				link->dpcd_caps.edp_supported_link_rates[link->dpcd_caps.edp_supported_link_rates_count] = link_rate;

				link->dpcd_caps.edp_supported_link_rates_count++;



				if (link->reported_link_cap.link_rate < link_rate)

					link->reported_link_cap.link_rate = link_rate;

			}

		}

	}



	core_link_read_dpcd(link, DP_EDP_BACKLIGHT_ADJUSTMENT_CAP,

						&backlight_adj_cap, sizeof(backlight_adj_cap));

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

+19 −2
Original line number Diff line number Diff line
@@ -300,6 +300,24 @@ bool set_cached_brightness_aux(struct dc_link *link) 
		return set_default_brightness_aux(link);

	return false;

}

bool edp_is_ilr_optimization_enabled(struct dc_link *link)

{

	if (link->dpcd_caps.edp_supported_link_rates_count == 0 || !link->panel_config.ilr.optimize_edp_link_rate)

		return false;

	return true;

}



enum dc_link_rate get_max_link_rate_from_ilr_table(struct dc_link *link)

{

	enum dc_link_rate link_rate = link->reported_link_cap.link_rate;



	for (int i = 0; i < link->dpcd_caps.edp_supported_link_rates_count; i++) {

		if (link_rate < link->dpcd_caps.edp_supported_link_rates[i])

			link_rate = link->dpcd_caps.edp_supported_link_rates[i];

	}



	return link_rate;

}



bool edp_is_ilr_optimization_required(struct dc_link *link,

		struct dc_crtc_timing *crtc_timing)
@@ -312,8 +330,7 @@ bool edp_is_ilr_optimization_required(struct dc_link *link, 


	ASSERT(link || crtc_timing); // invalid input



	if (link->dpcd_caps.edp_supported_link_rates_count == 0 ||

			!link->panel_config.ilr.optimize_edp_link_rate)

	if (!edp_is_ilr_optimization_enabled(link))

		return false;

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h

+2 −0
Original line number Diff line number Diff line
@@ -64,6 +64,8 @@ bool edp_get_replay_state(const struct dc_link *link, uint64_t *state); 
bool edp_wait_for_t12(struct dc_link *link);

bool edp_is_ilr_optimization_required(struct dc_link *link,

       struct dc_crtc_timing *crtc_timing);

bool edp_is_ilr_optimization_enabled(struct dc_link *link);

enum dc_link_rate get_max_link_rate_from_ilr_table(struct dc_link *link);

bool edp_backlight_enable_aux(struct dc_link *link, bool enable);

void edp_add_delay_for_T9(struct dc_link *link);

bool edp_receiver_ready_T9(struct dc_link *link);