Commit 3fd66112 authored by Chunfeng Yun's avatar Chunfeng Yun Committed by Vinod Koul
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phy: phy-mtk-tphy: use clock bulk to get clocks 



Use clock bulk helpers to get/enable/disable clocks

Signed-off-by: default avatarChunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-2-git-send-email-chunfeng.yun@mediatek.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent c01608b3

drivers/phy/mediatek/phy-mtk-tphy.c

+13 −30
Original line number Diff line number Diff line
@@ -280,6 +280,8 @@ 
#define RG_CDR_BIRLTD0_GEN3_MSK		GENMASK(4, 0)

#define RG_CDR_BIRLTD0_GEN3_VAL(x)	(0x1f & (x))



#define TPHY_CLKS_CNT	2



enum mtk_phy_version {

	MTK_PHY_V1 = 1,

	MTK_PHY_V2,
@@ -318,8 +320,7 @@ struct mtk_phy_instance { 
		struct u2phy_banks u2_banks;

		struct u3phy_banks u3_banks;

	};

	struct clk *ref_clk;	/* reference clock of (digital) phy */

	struct clk *da_ref_clk;	/* reference clock of analog phy */

	struct clk_bulk_data clks[TPHY_CLKS_CNT];

	u32 index;

	u8 type;

	int eye_src;
@@ -974,18 +975,9 @@ static int mtk_phy_init(struct phy *phy) 
	struct mtk_tphy *tphy = dev_get_drvdata(phy->dev.parent);

	int ret;



	ret = clk_prepare_enable(instance->ref_clk);

	if (ret) {

		dev_err(tphy->dev, "failed to enable ref_clk\n");

	ret = clk_bulk_prepare_enable(TPHY_CLKS_CNT, instance->clks);

	if (ret)

		return ret;

	}



	ret = clk_prepare_enable(instance->da_ref_clk);

	if (ret) {

		dev_err(tphy->dev, "failed to enable da_ref\n");

		clk_disable_unprepare(instance->ref_clk);

		return ret;

	}



	switch (instance->type) {

	case PHY_TYPE_USB2:
@@ -1003,8 +995,7 @@ static int mtk_phy_init(struct phy *phy) 
		break;

	default:

		dev_err(tphy->dev, "incompatible PHY type\n");

		clk_disable_unprepare(instance->ref_clk);

		clk_disable_unprepare(instance->da_ref_clk);

		clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);

		return -EINVAL;

	}
@@ -1047,8 +1038,7 @@ static int mtk_phy_exit(struct phy *phy) 
	if (instance->type == PHY_TYPE_USB2)

		u2_phy_instance_exit(tphy, instance);



	clk_disable_unprepare(instance->ref_clk);

	clk_disable_unprepare(instance->da_ref_clk);

	clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);

	return 0;

}
@@ -1211,6 +1201,7 @@ static int mtk_tphy_probe(struct platform_device *pdev) 
	port = 0;

	for_each_child_of_node(np, child_np) {

		struct mtk_phy_instance *instance;

		struct clk_bulk_data *clks;

		struct phy *phy;



		instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL);
@@ -1247,22 +1238,14 @@ static int mtk_tphy_probe(struct platform_device *pdev) 
		phy_set_drvdata(phy, instance);

		port++;



		instance->ref_clk = devm_clk_get_optional(&phy->dev, "ref");

		if (IS_ERR(instance->ref_clk)) {

			dev_err(dev, "failed to get ref_clk(id-%d)\n", port);

			retval = PTR_ERR(instance->ref_clk);

		clks = instance->clks;

		clks[0].id = "ref";     /* digital (& analog) clock */

		clks[1].id = "da_ref";  /* analog clock */

		retval = devm_clk_bulk_get_optional(&phy->dev, TPHY_CLKS_CNT, clks);

		if (retval)

			goto put_child;

	}



		instance->da_ref_clk =

			devm_clk_get_optional(&phy->dev, "da_ref");

		if (IS_ERR(instance->da_ref_clk)) {

			dev_err(dev, "failed to get da_ref_clk(id-%d)\n", port);

			retval = PTR_ERR(instance->da_ref_clk);

			goto put_child;

		}

	}



	provider = devm_of_phy_provider_register(dev, mtk_phy_xlate);



	return PTR_ERR_OR_ZERO(provider);