Commit 3fd14cdc authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mtd/for-4.17' of git://git.infradead.org/linux-mtd 

Pull MTD updates from Boris Brezillon:
 "MTD Core:
   - Remove support for asynchronous erase (not implemented by any of
     the existing drivers anyway)
   - Remove Cyrille from the list of SPI NOR and MTD maintainers
   - Fix kernel doc headers
   - Allow users to define the partitions parsers they want to test
     through a DT property (compatible of the partitions subnode)
   - Remove the bfin-async-flash driver (the only architecture using it
     has been removed)
   - Fix pagetest test
   - Add extra checks in mtd_erase()
   - Simplify the MTD partition creation logic and get rid of
     mtd_add_device_partitions()

  MTD Drivers:
   - Add endianness information to the physmap DT binding
   - Add Eon EN29LV400A IDs to JEDEC probe logic
   - Use %*ph where appropriate

  SPI NOR Drivers:
   - Make fsl-quaspi assign different names to MTD devices connected to
     the same QSPI controller
   - Remove an unneeded driver.bus assigned in the fsl-qspi driver

  NAND Core:
   - Prepare arrival of the SPI NAND subsystem by implementing a generic
     (interface-agnostic) layer to ease manipulation of NAND devices
   - Move onenand code base to the drivers/mtd/nand/ dir
   - Rework timing mode selection
   - Provide a generic way for NAND chip drivers to flag a specific
     GET/SET FEATURE operation as supported/unsupported
   - Stop embedding ONFI/JEDEC param page in nand_chip

  NAND Drivers:
   - Rework/cleanup of the mxc driver
   - Various cleanups in the vf610 driver
   - Migrate the fsmc and vf610 to ->exec_op()
   - Get rid of the pxa driver (replaced by marvell_nand)
   - Support ->setup_data_interface() in the GPMI driver
   - Fix probe error path in several drivers
   - Remove support for unused hw_syndrome mode in sunxi_nand
   - Various minor improvements"

* tag 'mtd/for-4.17' of git://git.infradead.org/linux-mtd: (89 commits)
  dt-bindings: fsl-quadspi: Add the example of two SPI NOR
  mtd: fsl-quadspi: Distinguish the mtd device names
  mtd: nand: Fix some function description mismatches in core.c
  mtd: fsl-quadspi: Remove unneeded driver.bus assignment
  mtd: rawnand: marvell: Rename ->ecc_clk into ->core_clk
  mtd: rawnand: s3c2410: enhance the probe function error path
  mtd: rawnand: tango: fix probe function error path
  mtd: rawnand: sh_flctl: fix the probe function error path
  mtd: rawnand: omap2: fix the probe function error path
  mtd: rawnand: mxc: fix probe function error path
  mtd: rawnand: denali: fix probe function error path
  mtd: rawnand: davinci: fix probe function error path
  mtd: rawnand: cafe: fix probe function error path
  mtd: rawnand: brcmnand: fix probe function error path
  mtd: rawnand: sunxi: Stop supporting ECC_HW_SYNDROME mode
  mtd: rawnand: marvell: Fix clock resource by adding a register clock
  mtd: ftl: Use DIV_ROUND_UP()
  mtd: Fix some function description mismatches in mtdcore.c
  mtd: physmap_of: update struct map_info's swap as per map requirement
  dt-bindings: mtd-physmap: Add endianness supports
  ...
parents 83c7c18b fe5f31a8

.mailmap

+4 −3
Original line number Diff line number Diff line
@@ -34,9 +34,9 @@ Axel Lin <axel.lin@gmail.com> 
Ben Gardner <bgardner@wabtec.com>

Ben M Cahill <ben.m.cahill@intel.com>

Björn Steinbrink <B.Steinbrink@gmx.de>

Boris Brezillon <boris.brezillon@free-electrons.com>

Boris Brezillon <boris.brezillon@free-electrons.com> <b.brezillon.dev@gmail.com>

Boris Brezillon <boris.brezillon@free-electrons.com> <b.brezillon@overkiz.com>

Boris Brezillon <boris.brezillon@bootlin.com> <boris.brezillon@free-electrons.com>

Boris Brezillon <boris.brezillon@bootlin.com> <b.brezillon.dev@gmail.com>

Boris Brezillon <boris.brezillon@bootlin.com> <b.brezillon@overkiz.com>

Brian Avery <b.avery@hp.com>

Brian King <brking@us.ibm.com>

Christoph Hellwig <hch@lst.de>
@@ -128,6 +128,7 @@ Mayuresh Janorkar <mayur@ti.com> 
Michael Buesch <m@bues.ch>

Michel Dänzer <michel@tungstengraphics.com>

Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>

Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>

Mitesh shah <mshah@teja.com>

Mohit Kumar <mohit.kumar@st.com> <mohit.kumar.dhaka@gmail.com>

Morten Welinder <terra@gnome.org>

Documentation/arm/Samsung-S3C24XX/S3C2412.txt

+1 −1
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@@ -46,7 +46,7 @@ NAND 
----



  The NAND hardware is similar to the S3C2440, and is supported by the

  s3c2410 driver in the drivers/mtd/nand directory.

  s3c2410 driver in the drivers/mtd/nand/raw directory.





USB Host

Documentation/devicetree/bindings/mtd/fsl-quadspi.txt

+24 −0
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@@ -39,3 +39,27 @@ qspi0: quadspi@40044000 { 
		....

	};

};



Example showing the usage of two SPI NOR devices:



&qspi2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_qspi2>;

	status = "okay";



	flash0: n25q256a@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "micron,n25q256a", "jedec,spi-nor";

		spi-max-frequency = <29000000>;

		reg = <0>;

	};



	flash1: n25q256a@1 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "micron,n25q256a", "jedec,spi-nor";

		spi-max-frequency = <29000000>;

		reg = <1>;

	};

};

Documentation/devicetree/bindings/mtd/marvell-nand.txt

+4 −1
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@@ -14,7 +14,10 @@ Required properties: 
- #address-cells: shall be set to 1. Encode the NAND CS.

- #size-cells: shall be set to 0.

- interrupts: shall define the NAND controller interrupt.

- clocks: shall reference the NAND controller clock.

- clocks: shall reference the NAND controller clocks, the second one is

  is only needed for the Armada 7K/8K SoCs

- clock-names: mandatory if there is a second clock, in this case there

  should be one clock named "core" and another one named "reg"

- marvell,system-controller: Set to retrieve the syscon node that handles

  NAND controller related registers (only required with the

  "marvell,armada-8k-nand[-controller]" compatibles).

Documentation/devicetree/bindings/mtd/mtd-physmap.txt

+7 −0
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@@ -41,6 +41,13 @@ additional (optional) property is defined: 


 - erase-size : The chip's physical erase block size in bytes.



 The device tree may optionally contain endianness property.

 little-endian or big-endian : It Represents the endianness that should be used

                               by the controller to  properly read/write data

			       from/to the flash. If this property is missing,

			       the endianness is chosen by the system

			       (potentially based on extra configuration options).



The device tree may optionally contain sub-nodes describing partitions of the

address space. See partition.txt for more detail.