Loading arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi 0 → 100644 +48 −0 Original line number Diff line number Diff line /* * QorIQ FMan v3 device tree nodes for ls1046 * * Copyright 2015-2016 Freescale Semiconductor Inc. * * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ &soc { /* include used FMan blocks */ #include "qoriq-fman3-0.dtsi" #include "qoriq-fman3-0-1g-0.dtsi" #include "qoriq-fman3-0-1g-1.dtsi" #include "qoriq-fman3-0-1g-2.dtsi" #include "qoriq-fman3-0-1g-3.dtsi" #include "qoriq-fman3-0-1g-4.dtsi" #include "qoriq-fman3-0-1g-5.dtsi" #include "qoriq-fman3-0-10g-0.dtsi" #include "qoriq-fman3-0-10g-1.dtsi" }; &fman0 { /* these aliases provide the FMan ports mapping */ enet0: ethernet@e0000 { }; enet1: ethernet@e2000 { }; enet2: ethernet@e4000 { }; enet3: ethernet@e6000 { }; enet4: ethernet@e8000 { }; enet5: ethernet@ea000 { }; enet6: ethernet@f0000 { }; enet7: ethernet@f2000 { }; }; arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +2 −0 Original line number Diff line number Diff line Loading @@ -210,3 +210,5 @@ reg = <0>; }; }; #include "fsl-ls1046-post.dtsi" arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts +60 −0 Original line number Diff line number Diff line Loading @@ -156,3 +156,63 @@ reg = <1>; }; }; #include "fsl-ls1046-post.dtsi" &fman0 { ethernet@e4000 { phy-handle = <&rgmii_phy1>; phy-connection-type = "rgmii"; }; ethernet@e6000 { phy-handle = <&rgmii_phy2>; phy-connection-type = "rgmii"; }; ethernet@e8000 { phy-handle = <&sgmii_phy1>; phy-connection-type = "sgmii"; }; ethernet@ea000 { phy-handle = <&sgmii_phy2>; phy-connection-type = "sgmii"; }; ethernet@f0000 { /* 10GEC1 */ phy-handle = <&aqr106_phy>; phy-connection-type = "xgmii"; }; ethernet@f2000 { /* 10GEC2 */ fixed-link = <0 1 1000 0 0>; phy-connection-type = "xgmii"; }; mdio@fc000 { rgmii_phy1: ethernet-phy@1 { reg = <0x1>; }; rgmii_phy2: ethernet-phy@2 { reg = <0x2>; }; sgmii_phy1: ethernet-phy@3 { reg = <0x3>; }; sgmii_phy2: ethernet-phy@4 { reg = <0x4>; }; }; mdio@fd000 { aqr106_phy: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; interrupts = <0 131 4>; reg = <0x0>; }; }; }; arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +10 −1 Original line number Diff line number Diff line Loading @@ -55,6 +55,15 @@ aliases { crypto = &crypto; fman0 = &fman0; ethernet0 = &enet0; ethernet1 = &enet1; ethernet2 = &enet2; ethernet3 = &enet3; ethernet4 = &enet4; ethernet5 = &enet5; ethernet6 = &enet6; ethernet7 = &enet7; }; cpus { Loading Loading @@ -174,7 +183,7 @@ IRQ_TYPE_LEVEL_LOW)>; }; soc { soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; Loading Loading
arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi 0 → 100644 +48 −0 Original line number Diff line number Diff line /* * QorIQ FMan v3 device tree nodes for ls1046 * * Copyright 2015-2016 Freescale Semiconductor Inc. * * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ &soc { /* include used FMan blocks */ #include "qoriq-fman3-0.dtsi" #include "qoriq-fman3-0-1g-0.dtsi" #include "qoriq-fman3-0-1g-1.dtsi" #include "qoriq-fman3-0-1g-2.dtsi" #include "qoriq-fman3-0-1g-3.dtsi" #include "qoriq-fman3-0-1g-4.dtsi" #include "qoriq-fman3-0-1g-5.dtsi" #include "qoriq-fman3-0-10g-0.dtsi" #include "qoriq-fman3-0-10g-1.dtsi" }; &fman0 { /* these aliases provide the FMan ports mapping */ enet0: ethernet@e0000 { }; enet1: ethernet@e2000 { }; enet2: ethernet@e4000 { }; enet3: ethernet@e6000 { }; enet4: ethernet@e8000 { }; enet5: ethernet@ea000 { }; enet6: ethernet@f0000 { }; enet7: ethernet@f2000 { }; };
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +2 −0 Original line number Diff line number Diff line Loading @@ -210,3 +210,5 @@ reg = <0>; }; }; #include "fsl-ls1046-post.dtsi"
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts +60 −0 Original line number Diff line number Diff line Loading @@ -156,3 +156,63 @@ reg = <1>; }; }; #include "fsl-ls1046-post.dtsi" &fman0 { ethernet@e4000 { phy-handle = <&rgmii_phy1>; phy-connection-type = "rgmii"; }; ethernet@e6000 { phy-handle = <&rgmii_phy2>; phy-connection-type = "rgmii"; }; ethernet@e8000 { phy-handle = <&sgmii_phy1>; phy-connection-type = "sgmii"; }; ethernet@ea000 { phy-handle = <&sgmii_phy2>; phy-connection-type = "sgmii"; }; ethernet@f0000 { /* 10GEC1 */ phy-handle = <&aqr106_phy>; phy-connection-type = "xgmii"; }; ethernet@f2000 { /* 10GEC2 */ fixed-link = <0 1 1000 0 0>; phy-connection-type = "xgmii"; }; mdio@fc000 { rgmii_phy1: ethernet-phy@1 { reg = <0x1>; }; rgmii_phy2: ethernet-phy@2 { reg = <0x2>; }; sgmii_phy1: ethernet-phy@3 { reg = <0x3>; }; sgmii_phy2: ethernet-phy@4 { reg = <0x4>; }; }; mdio@fd000 { aqr106_phy: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; interrupts = <0 131 4>; reg = <0x0>; }; }; };
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +10 −1 Original line number Diff line number Diff line Loading @@ -55,6 +55,15 @@ aliases { crypto = &crypto; fman0 = &fman0; ethernet0 = &enet0; ethernet1 = &enet1; ethernet2 = &enet2; ethernet3 = &enet3; ethernet4 = &enet4; ethernet5 = &enet5; ethernet6 = &enet6; ethernet7 = &enet7; }; cpus { Loading Loading @@ -174,7 +183,7 @@ IRQ_TYPE_LEVEL_LOW)>; }; soc { soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; Loading