Commit 3f6ecaf1 authored May 04, 2021 by Geert Uytterhoeven

clk: renesas: cpg-mssr: Make srstclr[] comment block consistent



Make the style of the comment block for the Software Reset Clearing
Register offsets consistent with the comment blocks for the other
register offsets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/97dde75fe3ff27b9639c59a43cddbd9d5c405d0c.1620119700.git.geert+renesas@glider.be

parent 682b108b

drivers/clk/renesas/renesas-cpg-mssr.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -100,7 +100,9 @@ static const u16 srcr_for_v3u[] = {
		0x2C20, 0x2C24, 0x2C28, 0x2C2C, 0x2C30, 0x2C34, 0x2C38,
		};

		/* Software Reset Clearing Register offsets */
		/*
		* Software Reset Clearing Register offsets
		*/

		static const u16 srstclr[] = {
		0x940, 0x944, 0x948, 0x94C, 0x950, 0x954, 0x958, 0x95C,