Unverified Commit 3f64510e authored by Conor Dooley's avatar Conor Dooley Committed by Palmer Dabbelt
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riscv: dts: canaan: fix the k210's timer nodes 



The timers on the k210 have non standard interrupt configurations,
which leads to dtbs_check warnings:

k210_generic.dtb: timer@502d0000: interrupts: [[14], [15]] is too long
From schema: Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml

Split the timer nodes in two, so that the second timer in the IP block
can actually be accessed & in the process solve the dtbs_check warning.

Reviewed-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220705215213.1802496-7-mail@conchuod.ie


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 465c1274

arch/riscv/boot/dts/canaan/k210.dtsi

+38 −8
Original line number Diff line number Diff line
@@ -319,28 +319,58 @@ 


			timer0: timer@502d0000 {

				compatible = "snps,dw-apb-timer";

				reg = <0x502D0000 0x100>;

				interrupts = <14>, <15>;

				reg = <0x502D0000 0x14>;

				interrupts = <14>;

				clocks = <&sysclk K210_CLK_TIMER0>,

					 <&sysclk K210_CLK_APB0>;

				clock-names = "timer", "pclk";

				resets = <&sysrst K210_RST_TIMER0>;

			};



			timer1: timer@502e0000 {

			timer1: timer@502d0014 {

				compatible = "snps,dw-apb-timer";

				reg = <0x502E0000 0x100>;

				interrupts = <16>, <17>;

				reg = <0x502D0014 0x14>;

				interrupts = <15>;

				clocks = <&sysclk K210_CLK_TIMER0>,

					 <&sysclk K210_CLK_APB0>;

				clock-names = "timer", "pclk";

				resets = <&sysrst K210_RST_TIMER0>;

			};



			timer2: timer@502e0000 {

				compatible = "snps,dw-apb-timer";

				reg = <0x502E0000 0x14>;

				interrupts = <16>;

				clocks = <&sysclk K210_CLK_TIMER1>,

					 <&sysclk K210_CLK_APB0>;

				clock-names = "timer", "pclk";

				resets = <&sysrst K210_RST_TIMER1>;

			};



			timer2: timer@502f0000 {

			timer3: timer@502e0014 {

				compatible = "snps,dw-apb-timer";

				reg = <0x502E0014 0x114>;

				interrupts = <17>;

				clocks = <&sysclk K210_CLK_TIMER1>,

					 <&sysclk K210_CLK_APB0>;

				clock-names = "timer", "pclk";

				resets = <&sysrst K210_RST_TIMER1>;

			};



			timer4: timer@502f0000 {

				compatible = "snps,dw-apb-timer";

				reg = <0x502F0000 0x14>;

				interrupts = <18>;

				clocks = <&sysclk K210_CLK_TIMER2>,

					 <&sysclk K210_CLK_APB0>;

				clock-names = "timer", "pclk";

				resets = <&sysrst K210_RST_TIMER2>;

			};



			timer5: timer@502f0014 {

				compatible = "snps,dw-apb-timer";

				reg = <0x502F0000 0x100>;

				interrupts = <18>, <19>;

				reg = <0x502F0014 0x14>;

				interrupts = <19>;

				clocks = <&sysclk K210_CLK_TIMER2>,

					 <&sysclk K210_CLK_APB0>;

				clock-names = "timer", "pclk";