Commit 3f623e06 authored by Matthew Brost's avatar Matthew Brost Committed by Matt Roper
Browse files

drm/i915: Move engine->schedule to i915_sched_engine 



The schedule function should be in the schedule object.

v3:
 (Jason Ekstrand)
  Add kernel doc

Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210618010638.98941-6-matthew.brost@intel.com
parent 349a2bc5

drivers/gpu/drm/i915/gem/i915_gem_wait.c

+2 −2
Original line number Diff line number Diff line
@@ -104,8 +104,8 @@ static void fence_set_priority(struct dma_fence *fence, 
	engine = rq->engine;



	rcu_read_lock(); /* RCU serialisation for set-wedged protection */

	if (engine->schedule)

		engine->schedule(rq, attr);

	if (engine->sched_engine->schedule)

		engine->sched_engine->schedule(rq, attr);

	rcu_read_unlock();

}

drivers/gpu/drm/i915/gt/intel_engine_cs.c

+0 −3
Original line number Diff line number Diff line
@@ -328,9 +328,6 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id) 
	if (engine->context_size)

		DRIVER_CAPS(i915)->has_logical_contexts = true;



	/* Nothing to do here, execute in order of dependencies */

	engine->schedule = NULL;



	ewma__engine_latency_init(&engine->latency);

	seqcount_init(&engine->stats.lock);

drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c

+2 −2
Original line number Diff line number Diff line
@@ -121,7 +121,7 @@ static void heartbeat(struct work_struct *wrk) 
			 * but all other contexts, including the kernel

			 * context are stuck waiting for the signal.

			 */

		} else if (engine->schedule &&

		} else if (engine->sched_engine->schedule &&

			   rq->sched.attr.priority < I915_PRIORITY_BARRIER) {

			/*

			 * Gradually raise the priority of the heartbeat to
@@ -136,7 +136,7 @@ static void heartbeat(struct work_struct *wrk) 
				attr.priority = I915_PRIORITY_BARRIER;



			local_bh_disable();

			engine->schedule(rq, &attr);

			engine->sched_engine->schedule(rq, &attr);

			local_bh_enable();

		} else {

			if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))

drivers/gpu/drm/i915/gt/intel_engine_types.h

+0 −8
Original line number Diff line number Diff line
@@ -428,14 +428,6 @@ struct intel_engine_cs { 
	void            (*bond_execute)(struct i915_request *rq,

					struct dma_fence *signal);



	/*

	 * Call when the priority on a request has changed and it and its

	 * dependencies may need rescheduling. Note the request itself may

	 * not be ready to run!

	 */

	void		(*schedule)(struct i915_request *request,

				    const struct i915_sched_attr *attr);



	void		(*release)(struct intel_engine_cs *engine);



	struct intel_engine_execlists execlists;

drivers/gpu/drm/i915/gt/intel_engine_user.c

+1 −1
Original line number Diff line number Diff line
@@ -108,7 +108,7 @@ static void set_scheduler_caps(struct drm_i915_private *i915) 
	for_each_uabi_engine(engine, i915) { /* all engines must agree! */

		int i;



		if (engine->schedule)

		if (engine->sched_engine->schedule)

			enabled |= (I915_SCHEDULER_CAP_ENABLED |

				    I915_SCHEDULER_CAP_PRIORITY);

		else