Commit 3f285c30 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

dt-bindings: power: renesas,rzg2l-sysc: Document RZ/G2UL SoC 



Add DT binding documentation for SYSC controller found on RZ/G2UL SoC's.
SYSC controller found on the RZ/G2UL SoC is almost identical to one found
on the RZ/G2L SoC's only difference being that the RZ/G2UL has only CA55
core0 reset vector address configuration register.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220315142644.17660-2-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 31231092

Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml

+3 −2
Original line number Diff line number Diff line
@@ -10,8 +10,8 @@ maintainers: 
  - Geert Uytterhoeven <geert+renesas@glider.be>



description:

  The RZ/{G2L,V2L} System Controller (SYSC) performs system control of the LSI

  and supports following functions,

  The RZ/{G2L,V2L}-alike System Controller (SYSC) performs system control of

  the LSI and supports following functions,

  - External terminal state capture function

  - 34-bit address space access function

  - Low power consumption control
@@ -20,6 +20,7 @@ description: 
properties:

  compatible:

    enum:

      - renesas,r9a07g043-sysc # RZ/G2UL

      - renesas,r9a07g044-sysc # RZ/G2{L,LC}

      - renesas,r9a07g054-sysc # RZ/V2L