Loading sound/soc/amd/raven/acp3x-pcm-dma.c +0 −10 Original line number Diff line number Diff line Loading @@ -235,10 +235,6 @@ static int acp3x_dma_open(struct snd_soc_component *component, return ret; } if (!adata->play_stream && !adata->capture_stream && !adata->i2ssp_play_stream && !adata->i2ssp_capture_stream) rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB); i2s_data->acp3x_base = adata->acp3x_base; runtime->private_data = i2s_data; return ret; Loading Loading @@ -365,12 +361,6 @@ static int acp3x_dma_close(struct snd_soc_component *component, } } /* Disable ACP irq, when the current stream is being closed and * another stream is also not active. */ if (!adata->play_stream && !adata->capture_stream && !adata->i2ssp_play_stream && !adata->i2ssp_capture_stream) rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB); return 0; } Loading sound/soc/amd/raven/acp3x.h +1 −0 Original line number Diff line number Diff line Loading @@ -77,6 +77,7 @@ #define ACP_POWER_OFF_IN_PROGRESS 0x03 #define ACP3x_ITER_IRER_SAMP_LEN_MASK 0x38 #define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF struct acp3x_platform_info { u16 play_i2s_instance; Loading sound/soc/amd/raven/pci-acp3x.c +15 −0 Original line number Diff line number Diff line Loading @@ -76,6 +76,19 @@ static int acp3x_reset(void __iomem *acp3x_base) return -ETIMEDOUT; } static void acp3x_enable_interrupts(void __iomem *acp_base) { rv_writel(0x01, acp_base + mmACP_EXTERNAL_INTR_ENB); } static void acp3x_disable_interrupts(void __iomem *acp_base) { rv_writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base + mmACP_EXTERNAL_INTR_STAT); rv_writel(0x00, acp_base + mmACP_EXTERNAL_INTR_CNTL); rv_writel(0x00, acp_base + mmACP_EXTERNAL_INTR_ENB); } static int acp3x_init(struct acp3x_dev_data *adata) { void __iomem *acp3x_base = adata->acp3x_base; Loading @@ -93,6 +106,7 @@ static int acp3x_init(struct acp3x_dev_data *adata) pr_err("ACP3x reset failed\n"); return ret; } acp3x_enable_interrupts(acp3x_base); return 0; } Loading @@ -100,6 +114,7 @@ static int acp3x_deinit(void __iomem *acp3x_base) { int ret; acp3x_disable_interrupts(acp3x_base); /* Reset */ ret = acp3x_reset(acp3x_base); if (ret) { Loading sound/soc/codecs/da7219.c +1 −4 Original line number Diff line number Diff line Loading @@ -2181,10 +2181,7 @@ static int da7219_register_dai_clks(struct snd_soc_component *component) ret); goto err; } da7219->dai_clks[i] = devm_clk_hw_get_clk(dev, dai_clk_hw, NULL); if (IS_ERR(da7219->dai_clks[i])) return PTR_ERR(da7219->dai_clks[i]); da7219->dai_clks[i] = dai_clk_hw->clk; /* For DT setup onecell data, otherwise create lookup */ if (np) { Loading sound/soc/codecs/max98088.c +11 −2 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ struct max98088_priv { enum max98088_type devtype; struct max98088_pdata *pdata; struct clk *mclk; unsigned char mclk_prescaler; unsigned int sysclk; struct max98088_cdata dai[2]; int eq_textcnt; Loading Loading @@ -998,13 +999,16 @@ static int max98088_dai1_hw_params(struct snd_pcm_substream *substream, /* Configure NI when operating as master */ if (snd_soc_component_read(component, M98088_REG_14_DAI1_FORMAT) & M98088_DAI_MAS) { unsigned long pclk; if (max98088->sysclk == 0) { dev_err(component->dev, "Invalid system clock frequency\n"); return -EINVAL; } ni = 65536ULL * (rate < 50000 ? 96ULL : 48ULL) * (unsigned long long int)rate; do_div(ni, (unsigned long long int)max98088->sysclk); pclk = DIV_ROUND_CLOSEST(max98088->sysclk, max98088->mclk_prescaler); ni = DIV_ROUND_CLOSEST_ULL(ni, pclk); snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, (ni >> 8) & 0x7F); snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, Loading Loading @@ -1065,13 +1069,16 @@ static int max98088_dai2_hw_params(struct snd_pcm_substream *substream, /* Configure NI when operating as master */ if (snd_soc_component_read(component, M98088_REG_1C_DAI2_FORMAT) & M98088_DAI_MAS) { unsigned long pclk; if (max98088->sysclk == 0) { dev_err(component->dev, "Invalid system clock frequency\n"); return -EINVAL; } ni = 65536ULL * (rate < 50000 ? 96ULL : 48ULL) * (unsigned long long int)rate; do_div(ni, (unsigned long long int)max98088->sysclk); pclk = DIV_ROUND_CLOSEST(max98088->sysclk, max98088->mclk_prescaler); ni = DIV_ROUND_CLOSEST_ULL(ni, pclk); snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, (ni >> 8) & 0x7F); snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, Loading Loading @@ -1113,8 +1120,10 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai, */ if ((freq >= 10000000) && (freq < 20000000)) { snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x10); max98088->mclk_prescaler = 1; } else if ((freq >= 20000000) && (freq < 30000000)) { snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x20); max98088->mclk_prescaler = 2; } else { dev_err(component->dev, "Invalid master clock frequency\n"); return -EINVAL; Loading Loading
sound/soc/amd/raven/acp3x-pcm-dma.c +0 −10 Original line number Diff line number Diff line Loading @@ -235,10 +235,6 @@ static int acp3x_dma_open(struct snd_soc_component *component, return ret; } if (!adata->play_stream && !adata->capture_stream && !adata->i2ssp_play_stream && !adata->i2ssp_capture_stream) rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB); i2s_data->acp3x_base = adata->acp3x_base; runtime->private_data = i2s_data; return ret; Loading Loading @@ -365,12 +361,6 @@ static int acp3x_dma_close(struct snd_soc_component *component, } } /* Disable ACP irq, when the current stream is being closed and * another stream is also not active. */ if (!adata->play_stream && !adata->capture_stream && !adata->i2ssp_play_stream && !adata->i2ssp_capture_stream) rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB); return 0; } Loading
sound/soc/amd/raven/acp3x.h +1 −0 Original line number Diff line number Diff line Loading @@ -77,6 +77,7 @@ #define ACP_POWER_OFF_IN_PROGRESS 0x03 #define ACP3x_ITER_IRER_SAMP_LEN_MASK 0x38 #define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF struct acp3x_platform_info { u16 play_i2s_instance; Loading
sound/soc/amd/raven/pci-acp3x.c +15 −0 Original line number Diff line number Diff line Loading @@ -76,6 +76,19 @@ static int acp3x_reset(void __iomem *acp3x_base) return -ETIMEDOUT; } static void acp3x_enable_interrupts(void __iomem *acp_base) { rv_writel(0x01, acp_base + mmACP_EXTERNAL_INTR_ENB); } static void acp3x_disable_interrupts(void __iomem *acp_base) { rv_writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base + mmACP_EXTERNAL_INTR_STAT); rv_writel(0x00, acp_base + mmACP_EXTERNAL_INTR_CNTL); rv_writel(0x00, acp_base + mmACP_EXTERNAL_INTR_ENB); } static int acp3x_init(struct acp3x_dev_data *adata) { void __iomem *acp3x_base = adata->acp3x_base; Loading @@ -93,6 +106,7 @@ static int acp3x_init(struct acp3x_dev_data *adata) pr_err("ACP3x reset failed\n"); return ret; } acp3x_enable_interrupts(acp3x_base); return 0; } Loading @@ -100,6 +114,7 @@ static int acp3x_deinit(void __iomem *acp3x_base) { int ret; acp3x_disable_interrupts(acp3x_base); /* Reset */ ret = acp3x_reset(acp3x_base); if (ret) { Loading
sound/soc/codecs/da7219.c +1 −4 Original line number Diff line number Diff line Loading @@ -2181,10 +2181,7 @@ static int da7219_register_dai_clks(struct snd_soc_component *component) ret); goto err; } da7219->dai_clks[i] = devm_clk_hw_get_clk(dev, dai_clk_hw, NULL); if (IS_ERR(da7219->dai_clks[i])) return PTR_ERR(da7219->dai_clks[i]); da7219->dai_clks[i] = dai_clk_hw->clk; /* For DT setup onecell data, otherwise create lookup */ if (np) { Loading
sound/soc/codecs/max98088.c +11 −2 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ struct max98088_priv { enum max98088_type devtype; struct max98088_pdata *pdata; struct clk *mclk; unsigned char mclk_prescaler; unsigned int sysclk; struct max98088_cdata dai[2]; int eq_textcnt; Loading Loading @@ -998,13 +999,16 @@ static int max98088_dai1_hw_params(struct snd_pcm_substream *substream, /* Configure NI when operating as master */ if (snd_soc_component_read(component, M98088_REG_14_DAI1_FORMAT) & M98088_DAI_MAS) { unsigned long pclk; if (max98088->sysclk == 0) { dev_err(component->dev, "Invalid system clock frequency\n"); return -EINVAL; } ni = 65536ULL * (rate < 50000 ? 96ULL : 48ULL) * (unsigned long long int)rate; do_div(ni, (unsigned long long int)max98088->sysclk); pclk = DIV_ROUND_CLOSEST(max98088->sysclk, max98088->mclk_prescaler); ni = DIV_ROUND_CLOSEST_ULL(ni, pclk); snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, (ni >> 8) & 0x7F); snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, Loading Loading @@ -1065,13 +1069,16 @@ static int max98088_dai2_hw_params(struct snd_pcm_substream *substream, /* Configure NI when operating as master */ if (snd_soc_component_read(component, M98088_REG_1C_DAI2_FORMAT) & M98088_DAI_MAS) { unsigned long pclk; if (max98088->sysclk == 0) { dev_err(component->dev, "Invalid system clock frequency\n"); return -EINVAL; } ni = 65536ULL * (rate < 50000 ? 96ULL : 48ULL) * (unsigned long long int)rate; do_div(ni, (unsigned long long int)max98088->sysclk); pclk = DIV_ROUND_CLOSEST(max98088->sysclk, max98088->mclk_prescaler); ni = DIV_ROUND_CLOSEST_ULL(ni, pclk); snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, (ni >> 8) & 0x7F); snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, Loading Loading @@ -1113,8 +1120,10 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai, */ if ((freq >= 10000000) && (freq < 20000000)) { snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x10); max98088->mclk_prescaler = 1; } else if ((freq >= 20000000) && (freq < 30000000)) { snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x20); max98088->mclk_prescaler = 2; } else { dev_err(component->dev, "Invalid master clock frequency\n"); return -EINVAL; Loading