Commit 3eea40d4 authored by Jason Gunthorpe's avatar Jason Gunthorpe
Browse files

Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux 



For dependencies in the following patches.

* mellanox/mlx5-next:
  net/mlx5: Add priorities for counters in RDMA namespaces
  net/mlx5: Add ifc bits to support optional counters

Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parents 2a152512 b8dfed63

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c

+46 −8
Original line number Diff line number Diff line
@@ -99,6 +99,9 @@ 
#define LEFTOVERS_NUM_LEVELS 1

#define LEFTOVERS_NUM_PRIOS 1



#define RDMA_RX_COUNTERS_PRIO_NUM_LEVELS 1

#define RDMA_TX_COUNTERS_PRIO_NUM_LEVELS 1



#define BY_PASS_PRIO_NUM_LEVELS 1

#define BY_PASS_MIN_LEVEL (ETHTOOL_MIN_LEVEL + MLX5_BY_PASS_NUM_PRIOS +\

			   LEFTOVERS_NUM_PRIOS)
@@ -206,34 +209,63 @@ static struct init_tree_node egress_root_fs = { 
	}

};



#define RDMA_RX_BYPASS_PRIO 0

#define RDMA_RX_KERNEL_PRIO 1

enum {

	RDMA_RX_COUNTERS_PRIO,

	RDMA_RX_BYPASS_PRIO,

	RDMA_RX_KERNEL_PRIO,

};



#define RDMA_RX_BYPASS_MIN_LEVEL MLX5_BY_PASS_NUM_REGULAR_PRIOS

#define RDMA_RX_KERNEL_MIN_LEVEL (RDMA_RX_BYPASS_MIN_LEVEL + 1)

#define RDMA_RX_COUNTERS_MIN_LEVEL (RDMA_RX_KERNEL_MIN_LEVEL + 2)



static struct init_tree_node rdma_rx_root_fs = {

	.type = FS_TYPE_NAMESPACE,

	.ar_size = 2,

	.ar_size = 3,

	.children = (struct init_tree_node[]) {

		[RDMA_RX_COUNTERS_PRIO] =

		ADD_PRIO(0, RDMA_RX_COUNTERS_MIN_LEVEL, 0,

			 FS_CHAINING_CAPS,

			 ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,

				ADD_MULTIPLE_PRIO(MLX5_RDMA_RX_NUM_COUNTERS_PRIOS,

						  RDMA_RX_COUNTERS_PRIO_NUM_LEVELS))),

		[RDMA_RX_BYPASS_PRIO] =

		ADD_PRIO(0, MLX5_BY_PASS_NUM_REGULAR_PRIOS, 0,

		ADD_PRIO(0, RDMA_RX_BYPASS_MIN_LEVEL, 0,

			 FS_CHAINING_CAPS,

			 ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,

				ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_REGULAR_PRIOS,

						  BY_PASS_PRIO_NUM_LEVELS))),

		[RDMA_RX_KERNEL_PRIO] =

		ADD_PRIO(0, MLX5_BY_PASS_NUM_REGULAR_PRIOS + 1, 0,

		ADD_PRIO(0, RDMA_RX_KERNEL_MIN_LEVEL, 0,

			 FS_CHAINING_CAPS,

			 ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_SWITCH_DOMAIN,

				ADD_MULTIPLE_PRIO(1, 1))),

	}

};



enum {

	RDMA_TX_COUNTERS_PRIO,

	RDMA_TX_BYPASS_PRIO,

};



#define RDMA_TX_BYPASS_MIN_LEVEL MLX5_BY_PASS_NUM_PRIOS

#define RDMA_TX_COUNTERS_MIN_LEVEL (RDMA_TX_BYPASS_MIN_LEVEL + 1)



static struct init_tree_node rdma_tx_root_fs = {

	.type = FS_TYPE_NAMESPACE,

	.ar_size = 1,

	.ar_size = 2,

	.children = (struct init_tree_node[]) {

		ADD_PRIO(0, MLX5_BY_PASS_NUM_PRIOS, 0,

		[RDMA_TX_COUNTERS_PRIO] =

		ADD_PRIO(0, RDMA_TX_COUNTERS_MIN_LEVEL, 0,

			 FS_CHAINING_CAPS,

			 ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,

				ADD_MULTIPLE_PRIO(MLX5_RDMA_TX_NUM_COUNTERS_PRIOS,

						  RDMA_TX_COUNTERS_PRIO_NUM_LEVELS))),

		[RDMA_TX_BYPASS_PRIO] =

		ADD_PRIO(0, RDMA_TX_BYPASS_MIN_LEVEL, 0,

			 FS_CHAINING_CAPS_RDMA_TX,

			 ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,

				ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_PRIOS,

				ADD_MULTIPLE_PRIO(RDMA_TX_BYPASS_MIN_LEVEL,

						  BY_PASS_PRIO_NUM_LEVELS))),

	}

};
@@ -2215,6 +2247,12 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev, 
		prio = RDMA_RX_KERNEL_PRIO;

	} else if (type == MLX5_FLOW_NAMESPACE_RDMA_TX) {

		root_ns = steering->rdma_tx_root_ns;

	} else if (type == MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS) {

		root_ns = steering->rdma_rx_root_ns;

		prio = RDMA_RX_COUNTERS_PRIO;

	} else if (type == MLX5_FLOW_NAMESPACE_RDMA_TX_COUNTERS) {

		root_ns = steering->rdma_tx_root_ns;

		prio = RDMA_TX_COUNTERS_PRIO;

	} else { /* Must be NIC RX */

		root_ns = steering->root_ns;

		prio = type;

include/linux/mlx5/device.h

+2 −0
Original line number Diff line number Diff line
@@ -1456,6 +1456,8 @@ static inline u16 mlx5_to_sw_pkey_sz(int pkey_sz) 
	return MLX5_MIN_PKEY_TABLE_SIZE << pkey_sz;

}



#define MLX5_RDMA_RX_NUM_COUNTERS_PRIOS 2

#define MLX5_RDMA_TX_NUM_COUNTERS_PRIOS 1

#define MLX5_BY_PASS_NUM_REGULAR_PRIOS 16

#define MLX5_BY_PASS_NUM_DONT_TRAP_PRIOS 16

#define MLX5_BY_PASS_NUM_MULTICAST_PRIOS 1

include/linux/mlx5/fs.h

+2 −0
Original line number Diff line number Diff line
@@ -83,6 +83,8 @@ enum mlx5_flow_namespace_type { 
	MLX5_FLOW_NAMESPACE_RDMA_RX,

	MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL,

	MLX5_FLOW_NAMESPACE_RDMA_TX,

	MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS,

	MLX5_FLOW_NAMESPACE_RDMA_TX_COUNTERS,

};



enum {

include/linux/mlx5/mlx5_ifc.h

+19 −3
Original line number Diff line number Diff line
@@ -342,7 +342,7 @@ struct mlx5_ifc_flow_table_fields_supported_bits { 
	u8         outer_geneve_oam[0x1];

	u8         outer_geneve_protocol_type[0x1];

	u8         outer_geneve_opt_len[0x1];

	u8         reserved_at_1e[0x1];

	u8         source_vhca_port[0x1];

	u8         source_eswitch_port[0x1];



	u8         inner_dmac[0x1];
@@ -393,6 +393,14 @@ struct mlx5_ifc_flow_table_fields_supported_bits { 
	u8         metadata_reg_c_0[0x1];

};



struct mlx5_ifc_flow_table_fields_supported_2_bits {

	u8         reserved_at_0[0xe];

	u8         bth_opcode[0x1];

	u8         reserved_at_f[0x11];



	u8         reserved_at_20[0x60];

};



struct mlx5_ifc_flow_table_prop_layout_bits {

	u8         ft_support[0x1];

	u8         reserved_at_1[0x1];
@@ -539,7 +547,7 @@ struct mlx5_ifc_fte_match_set_misc_bits { 
	union mlx5_ifc_gre_key_bits gre_key;



	u8         vxlan_vni[0x18];

	u8         reserved_at_b8[0x8];

	u8         bth_opcode[0x8];



	u8         geneve_vni[0x18];

	u8         reserved_at_d8[0x7];
@@ -756,7 +764,15 @@ struct mlx5_ifc_flow_table_nic_cap_bits { 


	struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;



	u8         reserved_at_e00[0x1200];

	u8         reserved_at_e00[0x700];



	struct mlx5_ifc_flow_table_fields_supported_2_bits ft_field_support_2_nic_receive_rdma;



	u8         reserved_at_1580[0x280];



	struct mlx5_ifc_flow_table_fields_supported_2_bits ft_field_support_2_nic_transmit_rdma;



	u8         reserved_at_1880[0x780];



	u8         sw_steering_nic_rx_action_drop_icm_address[0x40];