Loading arch/arm/include/asm/idmap.h 0 → 100644 +14 −0 Original line number Diff line number Diff line #ifndef __ASM_IDMAP_H #define __ASM_IDMAP_H #include <linux/compiler.h> #include <asm/pgtable.h> /* Tag a function as requiring to be executed via an identity mapping. */ #define __idmap __section(.idmap.text) noinline notrace extern pgd_t *idmap_pgd; void setup_mm_for_reboot(void); #endif /* __ASM_IDMAP_H */ arch/arm/include/asm/pgtable.h +0 −3 Original line number Diff line number Diff line Loading @@ -347,9 +347,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) #define pgtable_cache_init() do { } while (0) void identity_mapping_add(pgd_t *, unsigned long, unsigned long); void identity_mapping_del(pgd_t *, unsigned long, unsigned long); #endif /* !__ASSEMBLY__ */ #endif /* CONFIG_MMU */ Loading arch/arm/kernel/head.S +10 −8 Original line number Diff line number Diff line Loading @@ -170,11 +170,11 @@ __create_page_tables: * Create identity mapping to cater for __enable_mmu. * This identity mapping will be removed by paging_init(). */ adr r0, __enable_mmu_loc adr r0, __turn_mmu_on_loc ldmia r0, {r3, r5, r6} sub r0, r0, r3 @ virt->phys offset add r5, r5, r0 @ phys __enable_mmu add r6, r6, r0 @ phys __enable_mmu_end add r5, r5, r0 @ phys __turn_mmu_on add r6, r6, r0 @ phys __turn_mmu_on_end mov r5, r5, lsr #SECTION_SHIFT mov r6, r6, lsr #SECTION_SHIFT Loading Loading @@ -287,10 +287,10 @@ __create_page_tables: ENDPROC(__create_page_tables) .ltorg .align __enable_mmu_loc: __turn_mmu_on_loc: .long . .long __enable_mmu .long __enable_mmu_end .long __turn_mmu_on .long __turn_mmu_on_end #if defined(CONFIG_SMP) __CPUINIT Loading Loading @@ -398,15 +398,17 @@ ENDPROC(__enable_mmu) * other registers depend on the function called upon completion */ .align 5 __turn_mmu_on: .pushsection .idmap.text, "ax" ENTRY(__turn_mmu_on) mov r0, r0 mcr p15, 0, r0, c1, c0, 0 @ write control reg mrc p15, 0, r3, c0, c0, 0 @ read id reg mov r3, r3 mov r3, r13 mov pc, r3 __enable_mmu_end: __turn_mmu_on_end: ENDPROC(__turn_mmu_on) .popsection #ifdef CONFIG_SMP_ON_UP Loading arch/arm/kernel/sleep.S +2 −0 Original line number Diff line number Diff line Loading @@ -54,6 +54,7 @@ ENDPROC(cpu_suspend_abort) * r0 = control register value */ .align 5 .pushsection .idmap.text,"ax" ENTRY(cpu_resume_mmu) ldr r3, =cpu_resume_after_mmu mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc Loading @@ -62,6 +63,7 @@ ENTRY(cpu_resume_mmu) mov r0, r0 mov pc, r3 @ jump to virtual address ENDPROC(cpu_resume_mmu) .popsection cpu_resume_after_mmu: bl cpu_init @ restore the und/abt/irq banked regs mov r0, #0 @ return zero on success Loading arch/arm/kernel/smp.c +2 −30 Original line number Diff line number Diff line Loading @@ -31,6 +31,7 @@ #include <asm/cpu.h> #include <asm/cputype.h> #include <asm/exception.h> #include <asm/idmap.h> #include <asm/topology.h> #include <asm/mmu_context.h> #include <asm/pgtable.h> Loading Loading @@ -61,7 +62,6 @@ int __cpuinit __cpu_up(unsigned int cpu) { struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); struct task_struct *idle = ci->idle; pgd_t *pgd; int ret; /* Loading @@ -83,30 +83,12 @@ int __cpuinit __cpu_up(unsigned int cpu) init_idle(idle, cpu); } /* * Allocate initial page tables to allow the new CPU to * enable the MMU safely. This essentially means a set * of our "standard" page tables, with the addition of * a 1:1 mapping for the physical address of the kernel. */ pgd = pgd_alloc(&init_mm); if (!pgd) return -ENOMEM; if (PHYS_OFFSET != PAGE_OFFSET) { #ifndef CONFIG_HOTPLUG_CPU identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end)); #endif identity_mapping_add(pgd, __pa(_stext), __pa(_etext)); identity_mapping_add(pgd, __pa(_sdata), __pa(_edata)); } /* * We need to tell the secondary core where to find * its stack and the page tables. */ secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; secondary_data.pgdir = virt_to_phys(pgd); secondary_data.pgdir = virt_to_phys(idmap_pgd); secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); Loading Loading @@ -142,16 +124,6 @@ int __cpuinit __cpu_up(unsigned int cpu) secondary_data.stack = NULL; secondary_data.pgdir = 0; if (PHYS_OFFSET != PAGE_OFFSET) { #ifndef CONFIG_HOTPLUG_CPU identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end)); #endif identity_mapping_del(pgd, __pa(_stext), __pa(_etext)); identity_mapping_del(pgd, __pa(_sdata), __pa(_edata)); } pgd_free(&init_mm, pgd); return ret; } Loading Loading
arch/arm/include/asm/idmap.h 0 → 100644 +14 −0 Original line number Diff line number Diff line #ifndef __ASM_IDMAP_H #define __ASM_IDMAP_H #include <linux/compiler.h> #include <asm/pgtable.h> /* Tag a function as requiring to be executed via an identity mapping. */ #define __idmap __section(.idmap.text) noinline notrace extern pgd_t *idmap_pgd; void setup_mm_for_reboot(void); #endif /* __ASM_IDMAP_H */
arch/arm/include/asm/pgtable.h +0 −3 Original line number Diff line number Diff line Loading @@ -347,9 +347,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) #define pgtable_cache_init() do { } while (0) void identity_mapping_add(pgd_t *, unsigned long, unsigned long); void identity_mapping_del(pgd_t *, unsigned long, unsigned long); #endif /* !__ASSEMBLY__ */ #endif /* CONFIG_MMU */ Loading
arch/arm/kernel/head.S +10 −8 Original line number Diff line number Diff line Loading @@ -170,11 +170,11 @@ __create_page_tables: * Create identity mapping to cater for __enable_mmu. * This identity mapping will be removed by paging_init(). */ adr r0, __enable_mmu_loc adr r0, __turn_mmu_on_loc ldmia r0, {r3, r5, r6} sub r0, r0, r3 @ virt->phys offset add r5, r5, r0 @ phys __enable_mmu add r6, r6, r0 @ phys __enable_mmu_end add r5, r5, r0 @ phys __turn_mmu_on add r6, r6, r0 @ phys __turn_mmu_on_end mov r5, r5, lsr #SECTION_SHIFT mov r6, r6, lsr #SECTION_SHIFT Loading Loading @@ -287,10 +287,10 @@ __create_page_tables: ENDPROC(__create_page_tables) .ltorg .align __enable_mmu_loc: __turn_mmu_on_loc: .long . .long __enable_mmu .long __enable_mmu_end .long __turn_mmu_on .long __turn_mmu_on_end #if defined(CONFIG_SMP) __CPUINIT Loading Loading @@ -398,15 +398,17 @@ ENDPROC(__enable_mmu) * other registers depend on the function called upon completion */ .align 5 __turn_mmu_on: .pushsection .idmap.text, "ax" ENTRY(__turn_mmu_on) mov r0, r0 mcr p15, 0, r0, c1, c0, 0 @ write control reg mrc p15, 0, r3, c0, c0, 0 @ read id reg mov r3, r3 mov r3, r13 mov pc, r3 __enable_mmu_end: __turn_mmu_on_end: ENDPROC(__turn_mmu_on) .popsection #ifdef CONFIG_SMP_ON_UP Loading
arch/arm/kernel/sleep.S +2 −0 Original line number Diff line number Diff line Loading @@ -54,6 +54,7 @@ ENDPROC(cpu_suspend_abort) * r0 = control register value */ .align 5 .pushsection .idmap.text,"ax" ENTRY(cpu_resume_mmu) ldr r3, =cpu_resume_after_mmu mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc Loading @@ -62,6 +63,7 @@ ENTRY(cpu_resume_mmu) mov r0, r0 mov pc, r3 @ jump to virtual address ENDPROC(cpu_resume_mmu) .popsection cpu_resume_after_mmu: bl cpu_init @ restore the und/abt/irq banked regs mov r0, #0 @ return zero on success Loading
arch/arm/kernel/smp.c +2 −30 Original line number Diff line number Diff line Loading @@ -31,6 +31,7 @@ #include <asm/cpu.h> #include <asm/cputype.h> #include <asm/exception.h> #include <asm/idmap.h> #include <asm/topology.h> #include <asm/mmu_context.h> #include <asm/pgtable.h> Loading Loading @@ -61,7 +62,6 @@ int __cpuinit __cpu_up(unsigned int cpu) { struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); struct task_struct *idle = ci->idle; pgd_t *pgd; int ret; /* Loading @@ -83,30 +83,12 @@ int __cpuinit __cpu_up(unsigned int cpu) init_idle(idle, cpu); } /* * Allocate initial page tables to allow the new CPU to * enable the MMU safely. This essentially means a set * of our "standard" page tables, with the addition of * a 1:1 mapping for the physical address of the kernel. */ pgd = pgd_alloc(&init_mm); if (!pgd) return -ENOMEM; if (PHYS_OFFSET != PAGE_OFFSET) { #ifndef CONFIG_HOTPLUG_CPU identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end)); #endif identity_mapping_add(pgd, __pa(_stext), __pa(_etext)); identity_mapping_add(pgd, __pa(_sdata), __pa(_edata)); } /* * We need to tell the secondary core where to find * its stack and the page tables. */ secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; secondary_data.pgdir = virt_to_phys(pgd); secondary_data.pgdir = virt_to_phys(idmap_pgd); secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); Loading Loading @@ -142,16 +124,6 @@ int __cpuinit __cpu_up(unsigned int cpu) secondary_data.stack = NULL; secondary_data.pgdir = 0; if (PHYS_OFFSET != PAGE_OFFSET) { #ifndef CONFIG_HOTPLUG_CPU identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end)); #endif identity_mapping_del(pgd, __pa(_stext), __pa(_etext)); identity_mapping_del(pgd, __pa(_sdata), __pa(_edata)); } pgd_free(&init_mm, pgd); return ret; } Loading