Commit 3ecb5463 authored by Claudiu Beznea's avatar Claudiu Beznea
Browse files

ARM: dts: at91: use clock-controller name for sckc nodes



Use clock-controller generic name for slow clock controller nodes.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230517094119.2894220-5-claudiu.beznea@microchip.com
parent f4f15c5c
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+1 −1
Original line number Diff line number Diff line
@@ -923,7 +923,7 @@
				status = "disabled";
			};

			clk32k: sckc@fffffd50 {
			clk32k: clock-controller@fffffd50 {
				compatible = "atmel,at91sam9x5-sckc";
				reg = <0xfffffd50 0x4>;
				clocks = <&slow_xtal>;
+1 −1
Original line number Diff line number Diff line
@@ -799,7 +799,7 @@
				status = "disabled";
			};

			clk32k: sckc@fffffd50 {
			clk32k: clock-controller@fffffd50 {
				compatible = "atmel,at91sam9x5-sckc";
				reg = <0xfffffd50 0x4>;
				clocks = <&slow_xtal>;
+1 −1
Original line number Diff line number Diff line
@@ -154,7 +154,7 @@
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			};

			clk32k: sckc@fffffe50 {
			clk32k: clock-controller@fffffe50 {
				compatible = "atmel,at91sam9x5-sckc";
				reg = <0xfffffe50 0x4>;
				clocks = <&slow_xtal>;
+1 −1
Original line number Diff line number Diff line
@@ -1322,7 +1322,7 @@
				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
			};

			clk32k: sckc@fffffe50 {
			clk32k: clock-controller@fffffe50 {
				compatible = "microchip,sam9x60-sckc";
				reg = <0xfffffe50 0x4>;
				clocks = <&slow_xtal>;
+1 −1
Original line number Diff line number Diff line
@@ -704,7 +704,7 @@
				status = "disabled";
			};

			clk32k: sckc@f8048050 {
			clk32k: clock-controller@f8048050 {
				compatible = "atmel,sama5d4-sckc";
				reg = <0xf8048050 0x4>;

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