Commit 3e7bc83e authored by John Clements's avatar John Clements Committed by Alex Deucher
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drm/amdgpu: enable ras eeprom support for sienna cichlid 



added I2C address and asic support flag

Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarJohn Clements <john.clements@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 732f2a30

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

+7 −1
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#define EEPROM_I2C_TARGET_ADDR_VEGA20		0xA0

#define EEPROM_I2C_TARGET_ADDR_ARCTURUS		0xA8

#define EEPROM_I2C_TARGET_ADDR_ARCTURUS_D342	0xA0

#define EEPROM_I2C_TARGET_ADDR_SIENNA_CICHLID   0xA0



/*

 * The 2 macros bellow represent the actual size in bytes that
@@ -62,7 +63,8 @@ 
static bool __is_ras_eeprom_supported(struct amdgpu_device *adev)

{

	if ((adev->asic_type == CHIP_VEGA20) ||

	    (adev->asic_type == CHIP_ARCTURUS))

	    (adev->asic_type == CHIP_ARCTURUS) ||

	    (adev->asic_type == CHIP_SIENNA_CICHLID))

		return true;



	return false;
@@ -100,6 +102,10 @@ static bool __get_eeprom_i2c_addr(struct amdgpu_device *adev, 
	case CHIP_ARCTURUS:

		return __get_eeprom_i2c_addr_arct(adev, i2c_addr);



	case CHIP_SIENNA_CICHLID:

		*i2c_addr = EEPROM_I2C_TARGET_ADDR_SIENNA_CICHLID;

		break;



	default:

		return false;

	}