Commit 3e238be2 authored by Russell King's avatar Russell King Committed by Russell King
Browse files

[ARM] sa1100: add clock event support 



d142b6e7 added clock source support,
now it's time for the clock event support.

Tested-by: default avatarThomas Kunze <thommycheck@gmx.de>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent b43a9e60

arch/arm/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -425,6 +425,8 @@ config ARCH_SA1100 
	select ARCH_MTD_XIP

	select GENERIC_GPIO

	select GENERIC_TIME

	select GENERIC_CLOCKEVENTS

	select TICK_ONESHOT

	select HAVE_IDE

	select HAVE_GPIO_LIB

	help

arch/arm/mach-sa1100/time.c

+65 −94
Original line number Diff line number Diff line
@@ -13,67 +13,69 @@ 
#include <linux/interrupt.h>

#include <linux/irq.h>

#include <linux/timex.h>

#include <linux/signal.h>

#include <linux/clocksource.h>

#include <linux/clockchips.h>



#include <asm/mach/time.h>

#include <asm/hardware.h>



#define RTC_DEF_DIVIDER		(32768 - 1)

#define RTC_DEF_TRIM            0

#define MIN_OSCR_DELTA 2



static int sa1100_set_rtc(void)

static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)

{

	unsigned long current_time = xtime.tv_sec;

	struct clock_event_device *c = dev_id;



	if (RTSR & RTSR_ALE) {

		/* make sure not to forward the clock over an alarm */

		unsigned long alarm = RTAR;

		if (current_time >= alarm && alarm >= RCNR)

			return -ERESTARTSYS;

	}

	RCNR = current_time;

	return 0;

}

	/* Disarm the compare/match, signal the event. */

	OIER &= ~OIER_E0;

	OSSR = OSSR_M0;

	c->event_handler(c);



#ifdef CONFIG_NO_IDLE_HZ

static unsigned long initial_match;

static int match_posponed;

#endif

	return IRQ_HANDLED;

}



static irqreturn_t

sa1100_timer_interrupt(int irq, void *dev_id)

static int

sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)

{

	unsigned int next_match;

	unsigned long flags, next, oscr;



	raw_local_irq_save(flags);

	OIER |= OIER_E0;

	next = OSCR + delta;

	OSMR0 = next;

	oscr = OSCR;

	raw_local_irq_restore(flags);



#ifdef CONFIG_NO_IDLE_HZ

	if (match_posponed) {

		match_posponed = 0;

		OSMR0 = initial_match;

	return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;

}

#endif



	/*

	 * Loop until we get ahead of the free running timer.

	 * This ensures an exact clock tick count and time accuracy.

	 * Since IRQs are disabled at this point, coherence between

	 * lost_ticks(updated in do_timer()) and the match reg value is

	 * ensured, hence we can use do_gettimeofday() from interrupt

	 * handlers.

	 */

	do {

		timer_tick();

		OSSR = OSSR_M0;  /* Clear match on timer 0 */

		next_match = (OSMR0 += LATCH);

	} while ((signed long)(next_match - OSCR) <= 0);

static void

sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)

{

	unsigned long flags;



	return IRQ_HANDLED;

	switch (mode) {

	case CLOCK_EVT_MODE_ONESHOT:

	case CLOCK_EVT_MODE_UNUSED:

	case CLOCK_EVT_MODE_SHUTDOWN:

		raw_local_irq_save(flags);

		OIER &= ~OIER_E0;

		OSSR = OSSR_M0;

		raw_local_irq_restore(flags);

		break;



	case CLOCK_EVT_MODE_RESUME:

	case CLOCK_EVT_MODE_PERIODIC:

		break;

	}

}



static struct irqaction sa1100_timer_irq = {

	.name		= "SA11xx Timer Tick",

	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,

	.handler	= sa1100_timer_interrupt,

static struct clock_event_device ckevt_sa1100_osmr0 = {

	.name		= "osmr0",

	.features	= CLOCK_EVT_FEAT_ONESHOT,

	.shift		= 32,

	.rating		= 200,

	.cpumask	= CPU_MASK_CPU0,

	.set_next_event	= sa1100_osmr0_set_next_event,

	.set_mode	= sa1100_osmr0_set_mode,

};



static cycle_t sa1100_read_oscr(void)
@@ -90,62 +92,34 @@ static struct clocksource cksrc_sa1100_oscr = { 
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,

};



static struct irqaction sa1100_timer_irq = {

	.name		= "ost0",

	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,

	.handler	= sa1100_ost0_interrupt,

	.dev_id		= &ckevt_sa1100_osmr0,

};



static void __init sa1100_timer_init(void)

{

	unsigned long flags;



	set_rtc = sa1100_set_rtc;



	OIER = 0;		/* disable any timer interrupts */

	OSSR = 0xf;		/* clear status on all timers */

	setup_irq(IRQ_OST0, &sa1100_timer_irq);

	local_irq_save(flags);

	OIER = OIER_E0;		/* enable match on timer 0 to cause interrupts */

	OSMR0 = OSCR + LATCH;	/* set initial match */

	local_irq_restore(flags);



	ckevt_sa1100_osmr0.mult =

		div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift);

	ckevt_sa1100_osmr0.max_delta_ns =

		clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);

	ckevt_sa1100_osmr0.min_delta_ns =

		clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;



	cksrc_sa1100_oscr.mult =

		clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);



	clocksource_register(&cksrc_sa1100_oscr);

}



#ifdef CONFIG_NO_IDLE_HZ

static int sa1100_dyn_tick_enable_disable(void)

{

	/* nothing to do */

	return 0;

}



static void sa1100_dyn_tick_reprogram(unsigned long ticks)

{

	if (ticks > 1) {

		initial_match = OSMR0;

		OSMR0 = initial_match + ticks * LATCH;

		match_posponed = 1;

	}

}

	setup_irq(IRQ_OST0, &sa1100_timer_irq);



static irqreturn_t

sa1100_dyn_tick_handler(int irq, void *dev_id)

{

	if (match_posponed) {

		match_posponed = 0;

		OSMR0 = initial_match;

		if ((signed long)(initial_match - OSCR) <= 0)

			return sa1100_timer_interrupt(irq, dev_id);

	}

	return IRQ_NONE;

	clocksource_register(&cksrc_sa1100_oscr);

	clockevents_register_device(&ckevt_sa1100_osmr0);

}



static struct dyn_tick_timer sa1100_dyn_tick = {

	.enable		= sa1100_dyn_tick_enable_disable,

	.disable	= sa1100_dyn_tick_enable_disable,

	.reprogram	= sa1100_dyn_tick_reprogram,

	.handler	= sa1100_dyn_tick_handler,

};

#endif



#ifdef CONFIG_PM

unsigned long osmr[4], oier;
@@ -181,7 +155,4 @@ struct sys_timer sa1100_timer = { 
	.init		= sa1100_timer_init,

	.suspend	= sa1100_timer_suspend,

	.resume		= sa1100_timer_resume,

#ifdef CONFIG_NO_IDLE_HZ

	.dyn_tick	= &sa1100_dyn_tick,

#endif

};