Loading arch/riscv/kernel/cpufeature.c +1 −1 Original line number Diff line number Diff line Loading @@ -59,7 +59,7 @@ bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit) } EXPORT_SYMBOL_GPL(__riscv_isa_extension_available); void riscv_fill_hwcap(void) void __init riscv_fill_hwcap(void) { struct device_node *node; const char *isa; Loading arch/riscv/mm/context.c +1 −1 Original line number Diff line number Diff line Loading @@ -213,7 +213,7 @@ static inline void set_mm(struct mm_struct *mm, unsigned int cpu) set_mm_noasid(mm); } static int asids_init(void) static int __init asids_init(void) { unsigned long old; Loading Loading
arch/riscv/kernel/cpufeature.c +1 −1 Original line number Diff line number Diff line Loading @@ -59,7 +59,7 @@ bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit) } EXPORT_SYMBOL_GPL(__riscv_isa_extension_available); void riscv_fill_hwcap(void) void __init riscv_fill_hwcap(void) { struct device_node *node; const char *isa; Loading
arch/riscv/mm/context.c +1 −1 Original line number Diff line number Diff line Loading @@ -213,7 +213,7 @@ static inline void set_mm(struct mm_struct *mm, unsigned int cpu) set_mm_noasid(mm); } static int asids_init(void) static int __init asids_init(void) { unsigned long old; Loading