Commit 3de89d88 authored by Paul Gerber's avatar Paul Gerber Committed by Daniel Lezcano
Browse files

thermal/drivers/imx8mm: Enable ADC when enabling monitor 



The i.MX 8MP has a ADC_PD bit in the TMU_TER register that controls the
operating mode of the ADC:
* 0 means normal operating mode
* 1 means power down mode

When enabling/disabling the TMU, the ADC operating mode must be set
accordingly.

i.MX 8M Mini & Nano are lacking this bit.

Signed-off-by: default avatarPaul Gerber <Paul.Gerber@tq-group.com>
Signed-off-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Fixes: 2b8f1f03 ("thermal: imx8mm: Add i.MX8MP support")
Link: https://lore.kernel.org/r/20211122114225.196280-1-alexander.stein@ew.tq-group.com


Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 673c68bd

drivers/thermal/imx8mm_thermal.c

+3 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#define TPS			0x4

#define TRITSR			0x20	/* TMU immediate temp */



#define TER_ADC_PD		BIT(30)

#define TER_EN			BIT(31)

#define TRITSR_TEMP0_VAL_MASK	0xff

#define TRITSR_TEMP1_VAL_MASK	0xff0000
@@ -113,6 +114,8 @@ static void imx8mm_tmu_enable(struct imx8mm_tmu *tmu, bool enable) 


	val = readl_relaxed(tmu->base + TER);

	val = enable ? (val | TER_EN) : (val & ~TER_EN);

	if (tmu->socdata->version == TMU_VER2)

		val = enable ? (val & ~TER_ADC_PD) : (val | TER_ADC_PD);

	writel_relaxed(val, tmu->base + TER);

}