Commit 3db1e531 authored by Richard Zhu's avatar Richard Zhu Committed by Lorenzo Pieralisi
Browse files

PCI: imx6: Add i.MX8MP PCIe support 

Add i.MX8MP PCIe support.
To avoid codes duplication when find the syscon regmap, add the iomux
gpr syscon compatible into drvdata.

Link: https://lore.kernel.org/r/1662109086-15881-8-git-send-email-hongxing.zhu@nxp.com


Tested-by: default avatarMarek Vasut <marex@denx.de>
Tested-by: default avatarRichard Leitner <richard.leitner@skidata.com>
Tested-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarRichard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
parent 0dbc4524

drivers/pci/controller/dwc/pci-imx6.c

+25 −2
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ enum imx6_pcie_variants { 
	IMX7D,

	IMX8MQ,

	IMX8MM,

	IMX8MP,

};



#define IMX6_PCIE_FLAG_IMX6_PHY			BIT(0)
@@ -61,6 +62,7 @@ struct imx6_pcie_drvdata { 
	enum imx6_pcie_variants variant;

	u32 flags;

	int dbi_length;

	const char *gpr;

};



struct imx6_pcie {
@@ -150,7 +152,8 @@ struct imx6_pcie { 
static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)

{

	WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&

		imx6_pcie->drvdata->variant != IMX8MM);

		imx6_pcie->drvdata->variant != IMX8MM &&

		imx6_pcie->drvdata->variant != IMX8MP);

	return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;

}
@@ -301,6 +304,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) 
{

	switch (imx6_pcie->drvdata->variant) {

	case IMX8MM:

	case IMX8MP:

		/*

		 * The PHY initialization had been done in the PHY

		 * driver, break here directly.
@@ -558,6 +562,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) 
		break;

	case IMX8MM:

	case IMX8MQ:

	case IMX8MP:

		ret = clk_prepare_enable(imx6_pcie->pcie_aux);

		if (ret) {

			dev_err(dev, "unable to enable pcie_aux clock\n");
@@ -602,6 +607,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) 
		break;

	case IMX8MM:

	case IMX8MQ:

	case IMX8MP:

		clk_disable_unprepare(imx6_pcie->pcie_aux);

		break;

	default:
@@ -669,6 +675,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) 
		reset_control_assert(imx6_pcie->pciephy_reset);

		fallthrough;

	case IMX8MM:

	case IMX8MP:

		reset_control_assert(imx6_pcie->apps_reset);

		break;

	case IMX6SX:
@@ -744,6 +751,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) 
		break;

	case IMX6Q:		/* Nothing to do */

	case IMX8MM:

	case IMX8MP:

		break;

	}
@@ -793,6 +801,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) 
	case IMX7D:

	case IMX8MQ:

	case IMX8MM:

	case IMX8MP:

		reset_control_deassert(imx6_pcie->apps_reset);

		break;

	}
@@ -812,6 +821,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) 
	case IMX7D:

	case IMX8MQ:

	case IMX8MM:

	case IMX8MP:

		reset_control_assert(imx6_pcie->apps_reset);

		break;

	}
@@ -1179,6 +1189,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) 
		}

		break;

	case IMX8MM:

	case IMX8MP:

		imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");

		if (IS_ERR(imx6_pcie->pcie_aux))

			return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux),
@@ -1216,7 +1227,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) 


	/* Grab GPR config register range */

	imx6_pcie->iomuxc_gpr =

		 syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");

		 syscon_regmap_lookup_by_compatible(imx6_pcie->drvdata->gpr);

	if (IS_ERR(imx6_pcie->iomuxc_gpr)) {

		dev_err(dev, "unable to find iomuxc registers\n");

		return PTR_ERR(imx6_pcie->iomuxc_gpr);
@@ -1295,12 +1306,14 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.flags = IMX6_PCIE_FLAG_IMX6_PHY |

			 IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE,

		.dbi_length = 0x200,

		.gpr = "fsl,imx6q-iomuxc-gpr",

	},

	[IMX6SX] = {

		.variant = IMX6SX,

		.flags = IMX6_PCIE_FLAG_IMX6_PHY |

			 IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE |

			 IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,

		.gpr = "fsl,imx6q-iomuxc-gpr",

	},

	[IMX6QP] = {

		.variant = IMX6QP,
@@ -1308,17 +1321,26 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
			 IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE |

			 IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,

		.dbi_length = 0x200,

		.gpr = "fsl,imx6q-iomuxc-gpr",

	},

	[IMX7D] = {

		.variant = IMX7D,

		.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,

		.gpr = "fsl,imx7d-iomuxc-gpr",

	},

	[IMX8MQ] = {

		.variant = IMX8MQ,

		.gpr = "fsl,imx8mq-iomuxc-gpr",

	},

	[IMX8MM] = {

		.variant = IMX8MM,

		.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,

		.gpr = "fsl,imx8mm-iomuxc-gpr",

	},

	[IMX8MP] = {

		.variant = IMX8MP,

		.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,

		.gpr = "fsl,imx8mp-iomuxc-gpr",

	},

};
@@ -1329,6 +1351,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { 
	{ .compatible = "fsl,imx7d-pcie",  .data = &drvdata[IMX7D],  },

	{ .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },

	{ .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },

	{ .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },

	{},

};