Unverified Commit 3d9cdcf6 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!507 KVM: arm64: Add minimal handling for the ARMv8.7 PMU

parents ff28fe48 ebfbd12b
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+1 −0
Original line number Original line Diff line number Diff line
@@ -921,6 +921,7 @@
#define ID_AA64DFR0_PMUVER_8_1		0x4
#define ID_AA64DFR0_PMUVER_8_1		0x4
#define ID_AA64DFR0_PMUVER_8_4		0x5
#define ID_AA64DFR0_PMUVER_8_4		0x5
#define ID_AA64DFR0_PMUVER_8_5		0x6
#define ID_AA64DFR0_PMUVER_8_5		0x6
#define ID_AA64DFR0_PMUVER_8_7		0x7
#define ID_AA64DFR0_PMUVER_IMP_DEF	0xf
#define ID_AA64DFR0_PMUVER_IMP_DEF	0xf


#define ID_AA64DFR0_PMSVER_8_2		0x1
#define ID_AA64DFR0_PMSVER_8_2		0x1
+5 −4
Original line number Original line Diff line number Diff line
@@ -23,11 +23,12 @@ static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc);
static u32 kvm_pmu_event_mask(struct kvm *kvm)
static u32 kvm_pmu_event_mask(struct kvm *kvm)
{
{
	switch (kvm->arch.pmuver) {
	switch (kvm->arch.pmuver) {
	case 1:			/* ARMv8.0 */
	case ID_AA64DFR0_PMUVER_8_0:
		return GENMASK(9, 0);
		return GENMASK(9, 0);
	case 4:			/* ARMv8.1 */
	case ID_AA64DFR0_PMUVER_8_1:
	case 5:			/* ARMv8.4 */
	case ID_AA64DFR0_PMUVER_8_4:
	case 6:			/* ARMv8.5 */
	case ID_AA64DFR0_PMUVER_8_5:
	case ID_AA64DFR0_PMUVER_8_7:
		return GENMASK(15, 0);
		return GENMASK(15, 0);
	default:		/* Shouldn't be here, just for sanity */
	default:		/* Shouldn't be here, just for sanity */
		WARN_ONCE(1, "Unknown PMU version %d\n", kvm->arch.pmuver);
		WARN_ONCE(1, "Unknown PMU version %d\n", kvm->arch.pmuver);