Commit 3d431d0f authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Lin Wang
Browse files

x86/fpu/xsave: Initialize offset/size cache early

mainline inclusion
from mainline-v5.18-rc1
commit 35a77d45
category: bugfix
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I73H0T
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=35a77d4503d9d9d0e19e3a2a0d3fc9ab09fb6857



Intel-SIG: commit 35a77d45 x86/fpu/xsave: Initialize offset/size cache early.

--------------------------------

Reading XSTATE feature information from CPUID over and over does not make
sense. The information has to be cached anyway, so it can be done early.

Prepare for runtime calculation of XSTATE offsets and allow
consolidation of the size calculation functions in a later step.

Rename the function while at it as it does not setup any features.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20220324134623.519411939@linutronix.de


Signed-off-by: default avatarLin Wang <lin.x.wang@intel.com>
parent 9ce40342
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