Commit 3d360154 authored by Joshua Ashton's avatar Joshua Ashton Committed by Alex Deucher
Browse files

drm/amd/display: Use dcc_ind_blk value to set register directly 



We don't need to do this workaround if we start setting this value when we fill the plane attributes.

Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarJoshua Ashton <joshua@froggi.es>
Reviewed-by: default avatarBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b64cc057

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+6 −1
Original line number Diff line number Diff line
@@ -5052,10 +5052,15 @@ fill_gfx9_plane_attributes_from_modifiers(struct amdgpu_device *adev, 


	if (modifier_has_dcc(modifier) && !force_disable_dcc) {

		uint64_t dcc_address = afb->address + afb->base.offsets[1];

		bool independent_64b_blks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier);



		dcc->enable = 1;

		dcc->meta_pitch = afb->base.pitches[1];

		dcc->independent_64b_blks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier);

		dcc->independent_64b_blks = independent_64b_blks;

		if (independent_64b_blks)

			dcc->dcc_ind_blk = hubp_ind_block_64b;

		else

			dcc->dcc_ind_blk = hubp_ind_block_unconstrained;



		address->grph.meta_addr.low_part = lower_32_bits(dcc_address);

		address->grph.meta_addr.high_part = upper_32_bits(dcc_address);

drivers/gpu/drm/amd/display/dc/core/dc.c

+1 −1
Original line number Diff line number Diff line
@@ -2015,7 +2015,7 @@ static enum surface_update_type get_plane_info_update_type(const struct dc_surfa 
	}



	if (u->plane_info->dcc.enable != u->surface->dcc.enable

			|| u->plane_info->dcc.independent_64b_blks != u->surface->dcc.independent_64b_blks

			|| u->plane_info->dcc.dcc_ind_blk != u->surface->dcc.dcc_ind_blk

			|| u->plane_info->dcc.meta_pitch != u->surface->dcc.meta_pitch) {

		/* During DCC on/off, stutter period is calculated before

		 * DCC has fully transitioned. This results in incorrect

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c

+0 −6
Original line number Diff line number Diff line
@@ -356,12 +356,6 @@ void hubp3_dcc_control_sienna_cichlid(struct hubp *hubp, 
{

	struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);



	/*Workaround until UMD fix the new dcc_ind_blk interface */

	if (dcc->independent_64b_blks && dcc->dcc_ind_blk == 0)

		dcc->dcc_ind_blk = 1;

	if (dcc->independent_64b_blks_c && dcc->dcc_ind_blk_c == 0)

		dcc->dcc_ind_blk_c = 1;



	REG_UPDATE_6(DCSURF_SURFACE_CONTROL,

		PRIMARY_SURFACE_DCC_EN, dcc->enable,

		PRIMARY_SURFACE_DCC_IND_BLK, dcc->dcc_ind_blk,