Commit 3d041e90 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Relocate CHV CGM gamma masks 



CGM_PIPE_GAMMA_RED_MASK & co. are misplaced. Move then below the
relevant register. And while at it add the degamma counterparts.

Reviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200925131656.10022-8-ville.syrjala@linux.intel.com
parent d3135691

drivers/gpu/drm/i915/i915_reg.h

+6 −3
Original line number Diff line number Diff line
@@ -11004,14 +11004,17 @@ enum skl_power_gate { 
#define _CGM_PIPE_A_CSC_COEFF67	(VLV_DISPLAY_BASE + 0x6790C)

#define _CGM_PIPE_A_CSC_COEFF8	(VLV_DISPLAY_BASE + 0x67910)

#define _CGM_PIPE_A_DEGAMMA	(VLV_DISPLAY_BASE + 0x66000)

#define   CGM_PIPE_DEGAMMA_RED_MASK	REG_GENMASK(13, 0)

#define   CGM_PIPE_DEGAMMA_GREEN_MASK	REG_GENMASK(29, 16)

#define   CGM_PIPE_DEGAMMA_BLUE_MASK	REG_GENMASK(13, 0)

#define _CGM_PIPE_A_GAMMA	(VLV_DISPLAY_BASE + 0x67000)

#define   CGM_PIPE_GAMMA_RED_MASK	REG_GENMASK(9, 0)

#define   CGM_PIPE_GAMMA_GREEN_MASK	REG_GENMASK(25, 16)

#define   CGM_PIPE_GAMMA_BLUE_MASK	REG_GENMASK(9, 0)

#define _CGM_PIPE_A_MODE	(VLV_DISPLAY_BASE + 0x67A00)

#define   CGM_PIPE_MODE_GAMMA	(1 << 2)

#define   CGM_PIPE_MODE_CSC	(1 << 1)

#define   CGM_PIPE_MODE_DEGAMMA	(1 << 0)

#define   CGM_PIPE_GAMMA_RED_MASK   REG_GENMASK(9, 0)

#define   CGM_PIPE_GAMMA_GREEN_MASK REG_GENMASK(25, 16)

#define   CGM_PIPE_GAMMA_BLUE_MASK  REG_GENMASK(9, 0)



#define _CGM_PIPE_B_CSC_COEFF01	(VLV_DISPLAY_BASE + 0x69900)

#define _CGM_PIPE_B_CSC_COEFF23	(VLV_DISPLAY_BASE + 0x69904)