Commit 3d00c59d authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'amd-drm-next-6.6-2023-07-28' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amd-drm-next-6.6-2023-07-28:

amdgpu:
- Lots of checkpatch cleanups
- GFX 9.4.3 updates
- Add USB PD and IFWI flashing documentation
- GPUVM updates
- RAS fixes
- DRR fixes
- FAMS fixes
- Virtual display fixes
- Soft IH fixes
- SMU13 fixes
- Rework PSP firmware loading for other IPs
- Kernel doc fixes
- DCN 3.0.1 fixes
- LTTPR fixes
- DP MST fixes
- DCN 3.1.6 fixes
- SubVP fixes
- Display bandwidth calculation fixes
- VCN4 secure submission fixes
- Allow building DC on RISC-V
- Add visible FB info to bo_print_info
- HBR3 fixes
- Add PSP 14.0 support
- GFX9 MCBP fix
- GMC10 vmhub index fix
- GMC11 vmhub index fix
- Create a new doorbell manager
- SR-IOV fixes

amdkfd:
- Cleanup CRIU dma-buf handling
- Use KIQ to unmap HIQ
- GFX 9.4.3 debugger updates
- GFX 9.4.2 debugger fixes
- Enable cooperative groups fof gfx11
- SVM fixes

radeon:
- Lots of checkpatch cleanups

Merge conflicts:
- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
	The switch to drm eu helpers in 8a206685 ("drm/amdgpu: use
	drm_exec for GEM and CSA handling v2") clashed with the
	cosmetic cleanups from 30953c4d ("drm/amdgpu: Fix style
	issues in amdgpu_gem.c"). I
	kept the former since the cleanup up code is gone.
- drivers/gpu/drm/amd/amdgpu/atom.c.
	adf64e21 ("drm/amd: Avoid reading the VBIOS part number
	twice") removed code that 992b8fe1 ("drm/radeon: Replace
	all non-returning strlcpy with strscpy") polished.

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230728214228.8102-1-alexander.deucher@amd.com


[sima: some merge conflict wrangling as noted]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parents 52920704 7ea1db28
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=======================
 dGPU firmware flashing
=======================

IFWI
----
Flashing the dGPU integrated firmware image (IFWI) is supported by GPUs that
use the PSP to orchestrate the update (Navi3x or newer GPUs).
For supported GPUs, `amdgpu` will export a series of sysfs files that can be
used for the flash process.

The IFWI flash process is:

1. Ensure the IFWI image is intended for the dGPU on the system.
2. "Write" the IFWI image to the sysfs file `psp_vbflash`. This will stage the IFWI in memory.
3. "Read" from the `psp_vbflash` sysfs file to initiate the flash process.
4. Poll the `psp_vbflash_status` sysfs file to determine when the flash process completes.

USB-C PD F/W
------------
On GPUs that support flashing an updated USB-C PD firmware image, the process
is done using the `usbc_pd_fw` sysfs file.

* Reading the file will provide the current firmware version.
* Writing the name of a firmware payload stored in `/lib/firmware/amdgpu` to the sysfs file will initiate the flash process.

The firmware payload stored in `/lib/firmware/amdgpu` can be named any name
as long as it doesn't conflict with other existing binaries that are used by
`amdgpu`.

sysfs files
-----------
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+1 −0
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@@ -10,6 +10,7 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures.
   module-parameters
   driver-core
   display/index
   flashing
   xgmi
   ras
   thermal
+2 −2
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@@ -62,7 +62,7 @@ subdir-ccflags-$(CONFIG_DRM_AMDGPU_WERROR) += -Werror
amdgpu-y := amdgpu_drv.o

# add KMS driver
amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu-y += amdgpu_device.o amdgpu_doorbell_mgr.o amdgpu_kms.o \
	amdgpu_atombios.o atombios_crtc.o amdgpu_connectors.o \
	atom.o amdgpu_fence.o amdgpu_ttm.o amdgpu_object.o amdgpu_gart.o \
	amdgpu_encoders.o amdgpu_display.o amdgpu_i2c.o \
@@ -98,7 +98,7 @@ amdgpu-y += \
	vega20_reg_init.o nbio_v7_4.o nbio_v2_3.o nv.o arct_reg_init.o mxgpu_nv.o \
	nbio_v7_2.o hdp_v4_0.o hdp_v5_0.o aldebaran_reg_init.o aldebaran.o soc21.o \
	sienna_cichlid.o smu_v13_0_10.o nbio_v4_3.o hdp_v6_0.o nbio_v7_7.o hdp_v5_2.o lsdma_v6_0.o \
	nbio_v7_9.o aqua_vanjaram_reg_init.o
	nbio_v7_9.o aqua_vanjaram.o

# add DF block
amdgpu-y += \
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@@ -1033,7 +1033,6 @@ struct amdgpu_device {
	bool                            has_pr3;

	bool                            ucode_sysfs_en;
	bool                            psp_sysfs_en;

	/* Chip product information */
	char				product_number[20];
@@ -1128,7 +1127,7 @@ void amdgpu_device_wreg(struct amdgpu_device *adev,
void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev,
				     u64 reg_addr, u32 reg_data);
void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
			     uint32_t reg, uint32_t v);
			     uint32_t reg, uint32_t v, uint32_t xcc_id);
void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);

@@ -1506,4 +1505,8 @@ static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)

int amdgpu_in_reset(struct amdgpu_device *adev);

extern const struct attribute_group amdgpu_vram_mgr_attr_group;
extern const struct attribute_group amdgpu_gtt_mgr_attr_group;
extern const struct attribute_group amdgpu_flash_attr_group;

#endif
+1 −1
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@@ -868,7 +868,7 @@ static struct amdgpu_numa_info *amdgpu_acpi_get_numa_info(uint32_t pxm)
	if (!numa_info) {
		struct sysinfo info;

		numa_info = kzalloc(sizeof *numa_info, GFP_KERNEL);
		numa_info = kzalloc(sizeof(*numa_info), GFP_KERNEL);
		if (!numa_info)
			return NULL;

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