Commit 3cd08451 authored by Ming Qian's avatar Ming Qian Committed by Hans Verkuil
Browse files

media: amphion: add vpu v4l2 m2m support 



vpu_v4l2.c implements the v4l2 m2m driver methods.
vpu_helpers.c implements the common helper functions
vpu_color.c converts the v4l2 colorspace with
the VUI parameters that specified by ITU-T | ISO/IEC

Signed-off-by: default avatarMing Qian <ming.qian@nxp.com>
Signed-off-by: default avatarShijie Qin <shijie.qin@nxp.com>
Signed-off-by: default avatarZhou Peng <eagle.zhou@nxp.com>
Reported-by: default avatarkernel test robot <lkp@intel.com>
Tested-by: default avatarNicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
parent 61cbf1c1

drivers/media/platform/amphion/vpu_color.c

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Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright 2020-2021 NXP

 */



#include <linux/init.h>

#include <linux/device.h>

#include <linux/ioctl.h>

#include <linux/list.h>

#include <linux/module.h>

#include <linux/kernel.h>

#include <linux/slab.h>

#include <linux/delay.h>

#include <linux/types.h>

#include <media/v4l2-device.h>

#include "vpu.h"

#include "vpu_helpers.h"



static const u8 colorprimaries[] = {

	0,

	V4L2_COLORSPACE_REC709,         /*Rec. ITU-R BT.709-6*/

	0,

	0,

	V4L2_COLORSPACE_470_SYSTEM_M,   /*Rec. ITU-R BT.470-6 System M*/

	V4L2_COLORSPACE_470_SYSTEM_BG,  /*Rec. ITU-R BT.470-6 System B, G*/

	V4L2_COLORSPACE_SMPTE170M,      /*SMPTE170M*/

	V4L2_COLORSPACE_SMPTE240M,      /*SMPTE240M*/

	0,                              /*Generic film*/

	V4L2_COLORSPACE_BT2020,         /*Rec. ITU-R BT.2020-2*/

	0,                              /*SMPTE ST 428-1*/

};



static const u8 colortransfers[] = {

	0,

	V4L2_XFER_FUNC_709,             /*Rec. ITU-R BT.709-6*/

	0,

	0,

	0,                              /*Rec. ITU-R BT.470-6 System M*/

	0,                              /*Rec. ITU-R BT.470-6 System B, G*/

	V4L2_XFER_FUNC_709,             /*SMPTE170M*/

	V4L2_XFER_FUNC_SMPTE240M,       /*SMPTE240M*/

	V4L2_XFER_FUNC_NONE,            /*Linear transfer characteristics*/

	0,

	0,

	0,                              /*IEC 61966-2-4*/

	0,                              /*Rec. ITU-R BT.1361-0 extended colour gamut*/

	V4L2_XFER_FUNC_SRGB,            /*IEC 61966-2-1 sRGB or sYCC*/

	V4L2_XFER_FUNC_709,             /*Rec. ITU-R BT.2020-2 (10 bit system)*/

	V4L2_XFER_FUNC_709,             /*Rec. ITU-R BT.2020-2 (12 bit system)*/

	V4L2_XFER_FUNC_SMPTE2084,       /*SMPTE ST 2084*/

	0,                              /*SMPTE ST 428-1*/

	0                               /*Rec. ITU-R BT.2100-0 hybrid log-gamma (HLG)*/

};



static const u8 colormatrixcoefs[] = {

	0,

	V4L2_YCBCR_ENC_709,              /*Rec. ITU-R BT.709-6*/

	0,

	0,

	0,                               /*Title 47 Code of Federal Regulations*/

	V4L2_YCBCR_ENC_601,              /*Rec. ITU-R BT.601-7 625*/

	V4L2_YCBCR_ENC_601,              /*Rec. ITU-R BT.601-7 525*/

	V4L2_YCBCR_ENC_SMPTE240M,        /*SMPTE240M*/

	0,

	V4L2_YCBCR_ENC_BT2020,           /*Rec. ITU-R BT.2020-2*/

	V4L2_YCBCR_ENC_BT2020_CONST_LUM  /*Rec. ITU-R BT.2020-2 constant*/

};



u32 vpu_color_cvrt_primaries_v2i(u32 primaries)

{

	return vpu_helper_find_in_array_u8(colorprimaries, ARRAY_SIZE(colorprimaries), primaries);

}



u32 vpu_color_cvrt_primaries_i2v(u32 primaries)

{

	return primaries < ARRAY_SIZE(colorprimaries) ? colorprimaries[primaries] : 0;

}



u32 vpu_color_cvrt_transfers_v2i(u32 transfers)

{

	return vpu_helper_find_in_array_u8(colortransfers, ARRAY_SIZE(colortransfers), transfers);

}



u32 vpu_color_cvrt_transfers_i2v(u32 transfers)

{

	return transfers < ARRAY_SIZE(colortransfers) ? colortransfers[transfers] : 0;

}



u32 vpu_color_cvrt_matrix_v2i(u32 matrix)

{

	return vpu_helper_find_in_array_u8(colormatrixcoefs, ARRAY_SIZE(colormatrixcoefs), matrix);

}



u32 vpu_color_cvrt_matrix_i2v(u32 matrix)

{

	return matrix < ARRAY_SIZE(colormatrixcoefs) ? colormatrixcoefs[matrix] : 0;

}



u32 vpu_color_cvrt_full_range_v2i(u32 full_range)

{

	return (full_range == V4L2_QUANTIZATION_FULL_RANGE);

}



u32 vpu_color_cvrt_full_range_i2v(u32 full_range)

{

	if (full_range)

		return V4L2_QUANTIZATION_FULL_RANGE;



	return V4L2_QUANTIZATION_LIM_RANGE;

}



int vpu_color_check_primaries(u32 primaries)

{

	return vpu_color_cvrt_primaries_v2i(primaries) ? 0 : -EINVAL;

}



int vpu_color_check_transfers(u32 transfers)

{

	return vpu_color_cvrt_transfers_v2i(transfers) ? 0 : -EINVAL;

}



int vpu_color_check_matrix(u32 matrix)

{

	return vpu_color_cvrt_matrix_v2i(matrix) ? 0 : -EINVAL;

}



int vpu_color_check_full_range(u32 full_range)

{

	int ret = -EINVAL;



	switch (full_range) {

	case V4L2_QUANTIZATION_FULL_RANGE:

	case V4L2_QUANTIZATION_LIM_RANGE:

		ret = 0;

		break;

	default:

		break;

	}



	return ret;

}



int vpu_color_get_default(u32 primaries, u32 *ptransfers, u32 *pmatrix, u32 *pfull_range)

{

	u32 transfers;

	u32 matrix;

	u32 full_range;



	switch (primaries) {

	case V4L2_COLORSPACE_REC709:

		transfers = V4L2_XFER_FUNC_709;

		matrix = V4L2_YCBCR_ENC_709;

		break;

	case V4L2_COLORSPACE_470_SYSTEM_M:

	case V4L2_COLORSPACE_470_SYSTEM_BG:

	case V4L2_COLORSPACE_SMPTE170M:

		transfers = V4L2_XFER_FUNC_709;

		matrix = V4L2_YCBCR_ENC_601;

		break;

	case V4L2_COLORSPACE_SMPTE240M:

		transfers = V4L2_XFER_FUNC_SMPTE240M;

		matrix = V4L2_YCBCR_ENC_SMPTE240M;

		break;

	case V4L2_COLORSPACE_BT2020:

		transfers = V4L2_XFER_FUNC_709;

		matrix = V4L2_YCBCR_ENC_BT2020;

		break;

	default:

		transfers = V4L2_XFER_FUNC_DEFAULT;

		matrix = V4L2_YCBCR_ENC_DEFAULT;

		break;

	}

	full_range = V4L2_QUANTIZATION_LIM_RANGE;



	if (ptransfers)

		*ptransfers = transfers;

	if (pmatrix)

		*pmatrix = matrix;

	if (pfull_range)

		*pfull_range = full_range;



	return 0;

}

drivers/media/platform/amphion/vpu_helpers.c

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// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright 2020-2021 NXP

 */



#include <linux/init.h>

#include <linux/interconnect.h>

#include <linux/ioctl.h>

#include <linux/list.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include "vpu.h"

#include "vpu_core.h"

#include "vpu_rpc.h"

#include "vpu_helpers.h"



int vpu_helper_find_in_array_u8(const u8 *array, u32 size, u32 x)

{

	int i;



	for (i = 0; i < size; i++) {

		if (array[i] == x)

			return i;

	}



	return 0;

}



bool vpu_helper_check_type(struct vpu_inst *inst, u32 type)

{

	const struct vpu_format *pfmt;



	for (pfmt = inst->formats; pfmt->pixfmt; pfmt++) {

		if (!vpu_iface_check_format(inst, pfmt->pixfmt))

			continue;

		if (pfmt->type == type)

			return true;

	}



	return false;

}



const struct vpu_format *vpu_helper_find_format(struct vpu_inst *inst, u32 type, u32 pixelfmt)

{

	const struct vpu_format *pfmt;



	if (!inst || !inst->formats)

		return NULL;



	if (!vpu_iface_check_format(inst, pixelfmt))

		return NULL;



	for (pfmt = inst->formats; pfmt->pixfmt; pfmt++) {

		if (pfmt->pixfmt == pixelfmt && (!type || type == pfmt->type))

			return pfmt;

	}



	return NULL;

}



const struct vpu_format *vpu_helper_enum_format(struct vpu_inst *inst, u32 type, int index)

{

	const struct vpu_format *pfmt;

	int i = 0;



	if (!inst || !inst->formats)

		return NULL;



	for (pfmt = inst->formats; pfmt->pixfmt; pfmt++) {

		if (!vpu_iface_check_format(inst, pfmt->pixfmt))

			continue;



		if (pfmt->type == type) {

			if (index == i)

				return pfmt;

			i++;

		}

	}



	return NULL;

}



u32 vpu_helper_valid_frame_width(struct vpu_inst *inst, u32 width)

{

	const struct vpu_core_resources *res;



	if (!inst)

		return width;



	res = vpu_get_resource(inst);

	if (!res)

		return width;

	if (res->max_width)

		width = clamp(width, res->min_width, res->max_width);

	if (res->step_width)

		width = ALIGN(width, res->step_width);



	return width;

}



u32 vpu_helper_valid_frame_height(struct vpu_inst *inst, u32 height)

{

	const struct vpu_core_resources *res;



	if (!inst)

		return height;



	res = vpu_get_resource(inst);

	if (!res)

		return height;

	if (res->max_height)

		height = clamp(height, res->min_height, res->max_height);

	if (res->step_height)

		height = ALIGN(height, res->step_height);



	return height;

}



static u32 get_nv12_plane_size(u32 width, u32 height, int plane_no,

			       u32 stride, u32 interlaced, u32 *pbl)

{

	u32 bytesperline;

	u32 size = 0;



	bytesperline = ALIGN(width, stride);

	if (pbl)

		bytesperline = max(bytesperline, *pbl);

	height = ALIGN(height, 2);

	if (plane_no == 0)

		size = bytesperline * height;

	else if (plane_no == 1)

		size = bytesperline * height >> 1;

	if (pbl)

		*pbl = bytesperline;



	return size;

}



static u32 get_tiled_8l128_plane_size(u32 fmt, u32 width, u32 height, int plane_no,

				      u32 stride, u32 interlaced, u32 *pbl)

{

	u32 ws = 3;

	u32 hs = 7;

	u32 bitdepth = 8;

	u32 bytesperline;

	u32 size = 0;



	if (interlaced)

		hs++;

	if (fmt == V4L2_PIX_FMT_NV12M_10BE_8L128)

		bitdepth = 10;

	bytesperline = DIV_ROUND_UP(width * bitdepth, BITS_PER_BYTE);

	bytesperline = ALIGN(bytesperline, 1 << ws);

	bytesperline = ALIGN(bytesperline, stride);

	if (pbl)

		bytesperline = max(bytesperline, *pbl);

	height = ALIGN(height, 1 << hs);

	if (plane_no == 0)

		size = bytesperline * height;

	else if (plane_no == 1)

		size = (bytesperline * ALIGN(height, 1 << (hs + 1))) >> 1;

	if (pbl)

		*pbl = bytesperline;



	return size;

}



static u32 get_default_plane_size(u32 width, u32 height, int plane_no,

				  u32 stride, u32 interlaced, u32 *pbl)

{

	u32 bytesperline;

	u32 size = 0;



	bytesperline = ALIGN(width, stride);

	if (pbl)

		bytesperline = max(bytesperline, *pbl);

	if (plane_no == 0)

		size = bytesperline * height;

	if (pbl)

		*pbl = bytesperline;



	return size;

}



u32 vpu_helper_get_plane_size(u32 fmt, u32 w, u32 h, int plane_no,

			      u32 stride, u32 interlaced, u32 *pbl)

{

	switch (fmt) {

	case V4L2_PIX_FMT_NV12M:

		return get_nv12_plane_size(w, h, plane_no, stride, interlaced, pbl);

	case V4L2_PIX_FMT_NV12M_8L128:

	case V4L2_PIX_FMT_NV12M_10BE_8L128:

		return get_tiled_8l128_plane_size(fmt, w, h, plane_no, stride, interlaced, pbl);

	default:

		return get_default_plane_size(w, h, plane_no, stride, interlaced, pbl);

	}

}



u32 vpu_helper_copy_from_stream_buffer(struct vpu_buffer *stream_buffer,

				       u32 *rptr, u32 size, void *dst)

{

	u32 offset;

	u32 start;

	u32 end;

	void *virt;



	if (!stream_buffer || !rptr || !dst)

		return -EINVAL;



	if (!size)

		return 0;



	offset = *rptr;

	start = stream_buffer->phys;

	end = start + stream_buffer->length;

	virt = stream_buffer->virt;



	if (offset < start || offset > end)

		return -EINVAL;



	if (offset + size <= end) {

		memcpy(dst, virt + (offset - start), size);

	} else {

		memcpy(dst, virt + (offset - start), end - offset);

		memcpy(dst + end - offset, virt, size + offset - end);

	}



	*rptr = vpu_helper_step_walk(stream_buffer, offset, size);

	return size;

}



u32 vpu_helper_copy_to_stream_buffer(struct vpu_buffer *stream_buffer,

				     u32 *wptr, u32 size, void *src)

{

	u32 offset;

	u32 start;

	u32 end;

	void *virt;



	if (!stream_buffer || !wptr || !src)

		return -EINVAL;



	if (!size)

		return 0;



	offset = *wptr;

	start = stream_buffer->phys;

	end = start + stream_buffer->length;

	virt = stream_buffer->virt;

	if (offset < start || offset > end)

		return -EINVAL;



	if (offset + size <= end) {

		memcpy(virt + (offset - start), src, size);

	} else {

		memcpy(virt + (offset - start), src, end - offset);

		memcpy(virt, src + end - offset, size + offset - end);

	}



	*wptr = vpu_helper_step_walk(stream_buffer, offset, size);



	return size;

}



u32 vpu_helper_memset_stream_buffer(struct vpu_buffer *stream_buffer,

				    u32 *wptr, u8 val, u32 size)

{

	u32 offset;

	u32 start;

	u32 end;

	void *virt;



	if (!stream_buffer || !wptr)

		return -EINVAL;



	if (!size)

		return 0;



	offset = *wptr;

	start = stream_buffer->phys;

	end = start + stream_buffer->length;

	virt = stream_buffer->virt;

	if (offset < start || offset > end)

		return -EINVAL;



	if (offset + size <= end) {

		memset(virt + (offset - start), val, size);

	} else {

		memset(virt + (offset - start), val, end - offset);

		memset(virt, val, size + offset - end);

	}



	offset += size;

	if (offset >= end)

		offset -= stream_buffer->length;



	*wptr = offset;



	return size;

}



u32 vpu_helper_get_free_space(struct vpu_inst *inst)

{

	struct vpu_rpc_buffer_desc desc;



	if (vpu_iface_get_stream_buffer_desc(inst, &desc))

		return 0;



	if (desc.rptr > desc.wptr)

		return desc.rptr - desc.wptr;

	else if (desc.rptr < desc.wptr)

		return (desc.end - desc.start + desc.rptr - desc.wptr);

	else

		return desc.end - desc.start;

}



u32 vpu_helper_get_used_space(struct vpu_inst *inst)

{

	struct vpu_rpc_buffer_desc desc;



	if (vpu_iface_get_stream_buffer_desc(inst, &desc))

		return 0;



	if (desc.wptr > desc.rptr)

		return desc.wptr - desc.rptr;

	else if (desc.wptr < desc.rptr)

		return (desc.end - desc.start + desc.wptr - desc.rptr);

	else

		return 0;

}



int vpu_helper_g_volatile_ctrl(struct v4l2_ctrl *ctrl)

{

	struct vpu_inst *inst = ctrl_to_inst(ctrl);



	switch (ctrl->id) {

	case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:

		ctrl->val = inst->min_buffer_cap;

		break;

	case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT:

		ctrl->val = inst->min_buffer_out;

		break;

	default:

		return -EINVAL;

	}



	return 0;

}



int vpu_helper_find_startcode(struct vpu_buffer *stream_buffer,

			      u32 pixelformat, u32 offset, u32 bytesused)

{

	u32 start_code;

	int start_code_size;

	u32 val = 0;

	int i;

	int ret = -EINVAL;



	if (!stream_buffer || !stream_buffer->virt)

		return -EINVAL;



	switch (pixelformat) {

	case V4L2_PIX_FMT_H264:

		start_code_size = 4;

		start_code = 0x00000001;

		break;

	default:

		return 0;

	}



	for (i = 0; i < bytesused; i++) {

		val = (val << 8) | vpu_helper_read_byte(stream_buffer, offset + i);

		if (i < start_code_size - 1)

			continue;

		if (val == start_code) {

			ret = i + 1 - start_code_size;

			break;

		}

	}



	return ret;

}



int vpu_find_dst_by_src(struct vpu_pair *pairs, u32 cnt, u32 src)

{

	u32 i;



	if (!pairs || !cnt)

		return -EINVAL;



	for (i = 0; i < cnt; i++) {

		if (pairs[i].src == src)

			return pairs[i].dst;

	}



	return -EINVAL;

}



int vpu_find_src_by_dst(struct vpu_pair *pairs, u32 cnt, u32 dst)

{

	u32 i;



	if (!pairs || !cnt)

		return -EINVAL;



	for (i = 0; i < cnt; i++) {

		if (pairs[i].dst == dst)

			return pairs[i].src;

	}



	return -EINVAL;

}

drivers/media/platform/amphion/vpu_helpers.h

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/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright 2020-2021 NXP

 */



#ifndef _AMPHION_VPU_HELPERS_H

#define _AMPHION_VPU_HELPERS_H



struct vpu_pair {

	u32 src;

	u32 dst;

};



#define MAKE_TIMESTAMP(s, ns)		(((s32)(s) * NSEC_PER_SEC) + (ns))

#define VPU_INVALID_TIMESTAMP		MAKE_TIMESTAMP(-1, 0)



int vpu_helper_find_in_array_u8(const u8 *array, u32 size, u32 x);

bool vpu_helper_check_type(struct vpu_inst *inst, u32 type);

const struct vpu_format *vpu_helper_find_format(struct vpu_inst *inst, u32 type, u32 pixelfmt);

const struct vpu_format *vpu_helper_enum_format(struct vpu_inst *inst, u32 type, int index);

u32 vpu_helper_valid_frame_width(struct vpu_inst *inst, u32 width);

u32 vpu_helper_valid_frame_height(struct vpu_inst *inst, u32 height);

u32 vpu_helper_get_plane_size(u32 fmt, u32 width, u32 height, int plane_no,

			      u32 stride, u32 interlaced, u32 *pbl);

u32 vpu_helper_copy_from_stream_buffer(struct vpu_buffer *stream_buffer,

				       u32 *rptr, u32 size, void *dst);

u32 vpu_helper_copy_to_stream_buffer(struct vpu_buffer *stream_buffer,

				     u32 *wptr, u32 size, void *src);

u32 vpu_helper_memset_stream_buffer(struct vpu_buffer *stream_buffer,

				    u32 *wptr, u8 val, u32 size);

u32 vpu_helper_get_free_space(struct vpu_inst *inst);

u32 vpu_helper_get_used_space(struct vpu_inst *inst);

int vpu_helper_g_volatile_ctrl(struct v4l2_ctrl *ctrl);

void vpu_helper_get_kmp_next(const u8 *pattern, int *next, int size);

int vpu_helper_kmp_search(u8 *s, int s_len, const u8 *p, int p_len, int *next);

int vpu_helper_kmp_search_in_stream_buffer(struct vpu_buffer *stream_buffer,

					   u32 offset, int bytesused,

					   const u8 *p, int p_len, int *next);

int vpu_helper_find_startcode(struct vpu_buffer *stream_buffer,

			      u32 pixelformat, u32 offset, u32 bytesused);



static inline u32 vpu_helper_step_walk(struct vpu_buffer *stream_buffer, u32 pos, u32 step)

{

	pos += step;

	if (pos > stream_buffer->phys + stream_buffer->length)

		pos -= stream_buffer->length;



	return pos;

}



static inline u8 vpu_helper_read_byte(struct vpu_buffer *stream_buffer, u32 pos)

{

	u8 *pdata = (u8 *)stream_buffer->virt;



	return pdata[pos % stream_buffer->length];

}



int vpu_color_check_primaries(u32 primaries);

int vpu_color_check_transfers(u32 transfers);

int vpu_color_check_matrix(u32 matrix);

int vpu_color_check_full_range(u32 full_range);

u32 vpu_color_cvrt_primaries_v2i(u32 primaries);

u32 vpu_color_cvrt_primaries_i2v(u32 primaries);

u32 vpu_color_cvrt_transfers_v2i(u32 transfers);

u32 vpu_color_cvrt_transfers_i2v(u32 transfers);

u32 vpu_color_cvrt_matrix_v2i(u32 matrix);

u32 vpu_color_cvrt_matrix_i2v(u32 matrix);

u32 vpu_color_cvrt_full_range_v2i(u32 full_range);

u32 vpu_color_cvrt_full_range_i2v(u32 full_range);

int vpu_color_get_default(u32 primaries, u32 *ptransfers, u32 *pmatrix, u32 *pfull_range);



int vpu_find_dst_by_src(struct vpu_pair *pairs, u32 cnt, u32 src);

int vpu_find_src_by_dst(struct vpu_pair *pairs, u32 cnt, u32 dst);

#endif

drivers/media/platform/amphion/vpu_v4l2.c

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drivers/media/platform/amphion/vpu_v4l2.h

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/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright 2020-2021 NXP

 */



#ifndef _AMPHION_VPU_V4L2_H

#define _AMPHION_VPU_V4L2_H



#include <linux/videodev2.h>



void vpu_inst_lock(struct vpu_inst *inst);

void vpu_inst_unlock(struct vpu_inst *inst);

void vpu_set_buffer_state(struct vb2_v4l2_buffer *vbuf, unsigned int state);

unsigned int vpu_get_buffer_state(struct vb2_v4l2_buffer *vbuf);



int vpu_v4l2_open(struct file *file, struct vpu_inst *inst);

int vpu_v4l2_close(struct file *file);



const struct vpu_format *vpu_try_fmt_common(struct vpu_inst *inst, struct v4l2_format *f);

int vpu_process_output_buffer(struct vpu_inst *inst);

int vpu_process_capture_buffer(struct vpu_inst *inst);

struct vb2_v4l2_buffer *vpu_find_buf_by_sequence(struct vpu_inst *inst, u32 type, u32 sequence);

struct vb2_v4l2_buffer *vpu_find_buf_by_idx(struct vpu_inst *inst, u32 type, u32 idx);

void vpu_v4l2_set_error(struct vpu_inst *inst);

int vpu_notify_eos(struct vpu_inst *inst);

int vpu_notify_source_change(struct vpu_inst *inst);

int vpu_set_last_buffer_dequeued(struct vpu_inst *inst);

void vpu_vb2_buffers_return(struct vpu_inst *inst, unsigned int type, enum vb2_buffer_state state);

int vpu_get_num_buffers(struct vpu_inst *inst, u32 type);



dma_addr_t vpu_get_vb_phy_addr(struct vb2_buffer *vb, u32 plane_no);

unsigned int vpu_get_vb_length(struct vb2_buffer *vb, u32 plane_no);

static inline struct vpu_format *vpu_get_format(struct vpu_inst *inst, u32 type)

{

	if (V4L2_TYPE_IS_OUTPUT(type))

		return &inst->out_format;

	else

		return &inst->cap_format;

}



static inline char *vpu_type_name(u32 type)

{

	return V4L2_TYPE_IS_OUTPUT(type) ? "output" : "capture";

}



static inline int vpu_vb_is_codecconfig(struct vb2_v4l2_buffer *vbuf)

{

#ifdef V4L2_BUF_FLAG_CODECCONFIG

	return (vbuf->flags & V4L2_BUF_FLAG_CODECCONFIG) ? 1 : 0;

#else

	return 0;

#endif

}



#endif