Commit 3cadf633 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab Committed by Greg Kroah-Hartman
Browse files

staging: hikey9xx: hi6421-spmi-pmic: document registers 



Make it clearer about how the IRQ registers are filled by adding
a table with them, with two macros used to calculate the mask
register.

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/10f52ec0a8346fb883245344886c44714c859cd1.1611949675.git.mchehab+huawei@kernel.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 307a60f0

drivers/staging/hikey9xx/hi6421-spmi-pmic.c

+32 −7
Original line number Diff line number Diff line
@@ -38,10 +38,6 @@ enum hi6421_spmi_pmic_irq_list { 


#define HISI_IRQ_ARRAY			2

#define HISI_IRQ_NUM			(HISI_IRQ_ARRAY * 8)

#define HISI_IRQ_MASK			GENMASK(1, 0)



#define SOC_PMIC_IRQ_MASK_0_ADDR	0x0202

#define SOC_PMIC_IRQ0_ADDR		0x0212



#define HISI_IRQ_KEY_NUM		0
@@ -49,6 +45,36 @@ enum hi6421_spmi_pmic_irq_list { 
#define HISI_IRQ_KEY_VALUE		(BIT(POWERKEY_DOWN) | BIT(POWERKEY_UP))

#define HISI_MASK			GENMASK(HISI_BITS - 1, 0)



/*

 * The IRQs are mapped as:

 *

 * 	======================  =============   ============	=====

 *	IRQ			MASK REGISTER 	IRQ REGISTER	BIT

 * 	======================  =============   ============	=====

 *	OTMP			0x0202		0x212		bit 0

 *	VBUS_CONNECT		0x0202		0x212		bit 1

 *	VBUS_DISCONNECT		0x0202		0x212		bit 2

 *	ALARMON_R		0x0202		0x212		bit 3

 *	HOLD_6S			0x0202		0x212		bit 4

 *	HOLD_1S			0x0202		0x212		bit 5

 *	POWERKEY_UP		0x0202		0x212		bit 6

 *	POWERKEY_DOWN		0x0202		0x212		bit 7

 *

 *	OCP_SCP_R		0x0203		0x213		bit 0

 *	COUL_R			0x0203		0x213		bit 1

 *	SIM0_HPD_R		0x0203		0x213		bit 2

 *	SIM0_HPD_F		0x0203		0x213		bit 3

 *	SIM1_HPD_R		0x0203		0x213		bit 4

 *	SIM1_HPD_F		0x0203		0x213		bit 5

 * 	======================  =============   ============	=====

 */

#define SOC_PMIC_IRQ_MASK_0_ADDR	0x0202

#define SOC_PMIC_IRQ0_ADDR		0x0212



#define IRQ_MASK_REGISTER(irq_data)	(SOC_PMIC_IRQ_MASK_0_ADDR + \

					 (irqd_to_hwirq(irq_data) >> 3))

#define IRQ_MASK_BIT(irq_data)		BIT(irqd_to_hwirq(irq_data) & 0x07)



static const struct mfd_cell hi6421v600_devs[] = {

	{ .name = "hi6421v600-regulator", },

};
@@ -89,13 +115,12 @@ static void hi6421_spmi_irq_mask(struct irq_data *d) 
	unsigned int data;

	u32 offset;



	offset = (irqd_to_hwirq(d) >> HISI_IRQ_MASK);

	offset += SOC_PMIC_IRQ_MASK_0_ADDR;

	offset = IRQ_MASK_REGISTER(d);



	spin_lock_irqsave(&ddata->lock, flags);



	regmap_read(ddata->regmap, offset, &data);

	data |= (1 << (irqd_to_hwirq(d) & 0x07));

	data |= IRQ_MASK_BIT(d);

	regmap_write(ddata->regmap, offset, data);



	spin_unlock_irqrestore(&ddata->lock, flags);