Unverified Commit 3c5cd2e2 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Mark Brown
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spi: mt65xx: Add kerneldoc for driver structures 



One of the two structures was already partially documented, but not
in kerneldoc format: enhance readability by adding the missing
documentation bits and use kerneldoc.

Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220407114428.167091-8-angelogioacchino.delregno@collabora.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 20cdbb80

drivers/spi/spi-mt65xx.c

+34 −5
Original line number Diff line number Diff line
@@ -110,20 +110,49 @@ 
#define DMA_ADDR_EXT_BITS (36)

#define DMA_ADDR_DEF_BITS (32)



/**

 * struct mtk_spi_compatible - device data structure

 * @need_pad_sel:	Enable pad (pins) selection in SPI controller

 * @must_tx:		Must explicitly send dummy TX bytes to do RX only transfer

 * @enhance_timing:	Enable adjusting cfg register to enhance time accuracy

 * @dma_ext:		DMA address extension supported

 * @no_need_unprepare:	Don't unprepare the SPI clk during runtime

 * @ipm_design:		Adjust/extend registers to support IPM design IP features

 */

struct mtk_spi_compatible {

	bool need_pad_sel;

	/* Must explicitly send dummy Tx bytes to do Rx only transfer */

	bool must_tx;

	/* some IC design adjust cfg register to enhance time accuracy */

	bool enhance_timing;

	/* some IC support DMA addr extension */

	bool dma_ext;

	/* some IC no need unprepare SPI clk */

	bool no_need_unprepare;

	/* IPM design adjust and extend register to support more features */

	bool ipm_design;

};



/**

 * struct mtk_spi - SPI driver instance

 * @base:		Start address of the SPI controller registers

 * @state:		SPI controller state

 * @pad_num:		Number of pad_sel entries

 * @pad_sel:		Groups of pins to select

 * @parent_clk:		Parent of sel_clk

 * @sel_clk:		SPI master mux clock

 * @spi_clk:		Peripheral clock

 * @spi_hclk:		AHB bus clock

 * @cur_transfer:	Currently processed SPI transfer

 * @xfer_len:		Number of bytes to transfer

 * @num_xfered:		Number of transferred bytes

 * @tx_sgl:		TX transfer scatterlist

 * @rx_sgl:		RX transfer scatterlist

 * @tx_sgl_len:		Size of TX DMA transfer

 * @rx_sgl_len:		Size of RX DMA transfer

 * @dev_comp:		Device data structure

 * @spi_clk_hz:		Current SPI clock in Hz

 * @spimem_done:	SPI-MEM operation completion

 * @use_spimem:		Enables SPI-MEM

 * @dev:		Device pointer

 * @tx_dma:		DMA start for SPI-MEM TX

 * @rx_dma:		DMA start for SPI-MEM RX

 */

struct mtk_spi {

	void __iomem *base;

	u32 state;