Unverified Commit 3c5a4e6d authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v5.19-rockchip-dtsfixes1' of...

Merge tag 'v5.19-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

rk3399 vdu clock-rate fix, otg port fix on Quartz64-A and ethernet
fix on Quartz64-B (actual production model)

* tag 'v5.19-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Assign RK3399 VDU clock rate
  arm64: dts: rockchip: Fix Quartz64-A dwc3 otg port behavior
  arm64: dts: rockchip: Fix ethernet on production Quartz64-B

Link: https://lore.kernel.org/r/7723415.29KlJPOoH8@phil


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c0d1a7bd 2d56af33
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+3 −1
Original line number Diff line number Diff line
@@ -376,7 +376,8 @@ camera: &i2c7 {
		<&cru ACLK_VIO>,
		<&cru ACLK_GIC_PRE>,
		<&cru PCLK_DDR>,
		<&cru ACLK_HDCP>;
		<&cru ACLK_HDCP>,
		<&cru ACLK_VDU>;
	assigned-clock-rates =
		<600000000>, <1600000000>,
		<1000000000>,
@@ -388,6 +389,7 @@ camera: &i2c7 {
		<400000000>,
		<200000000>,
		<200000000>,
		<400000000>,
		<400000000>;
};

+4 −2
Original line number Diff line number Diff line
@@ -1462,7 +1462,8 @@
			<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
			<&cru ACLK_VIO>, <&cru ACLK_HDCP>,
			<&cru ACLK_GIC_PRE>,
			<&cru PCLK_DDR>;
			<&cru PCLK_DDR>,
			<&cru ACLK_VDU>;
		assigned-clock-rates =
			 <594000000>,  <800000000>,
			<1000000000>,
@@ -1473,7 +1474,8 @@
			 <100000000>,   <50000000>,
			 <400000000>, <400000000>,
			 <200000000>,
			 <200000000>;
			 <200000000>,
			 <400000000>;
	};

	grf: syscon@ff770000 {
+1 −0
Original line number Diff line number Diff line
@@ -687,6 +687,7 @@
};

&usb_host0_xhci {
	dr_mode = "host";
	status = "okay";
};

+1 −1
Original line number Diff line number Diff line
@@ -133,7 +133,7 @@
	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
	clock_in_out = "input";
	phy-mode = "rgmii-id";
	phy-mode = "rgmii";
	phy-supply = <&vcc_3v3>;
	pinctrl-names = "default";
	pinctrl-0 = <&gmac1m1_miim