Commit 3bc8e0af authored by Ilya Lipnitskiy's avatar Ilya Lipnitskiy Committed by David S. Miller
Browse files

net: ethernet: mtk_eth_soc: use iopoll.h macro for DMA init 



Replace a tight busy-wait loop without a pause with a standard
readx_poll_timeout_atomic routine with a 5 us poll period.

Tested by booting a MT7621 device to ensure the driver initializes
properly.

Signed-off-by: default avatarIlya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent fa817272

drivers/net/ethernet/mediatek/mtk_eth_soc.c

+13 −16
Original line number Diff line number Diff line
@@ -2033,25 +2033,22 @@ static int mtk_set_features(struct net_device *dev, netdev_features_t features) 
/* wait for DMA to finish whatever it is doing before we start using it again */

static int mtk_dma_busy_wait(struct mtk_eth *eth)

{

	unsigned long t_start = jiffies;



	while (1) {

		if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {

			if (!(mtk_r32(eth, MTK_QDMA_GLO_CFG) &

			      (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)))

				return 0;

		} else {

			if (!(mtk_r32(eth, MTK_PDMA_GLO_CFG) &

			      (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)))

				return 0;

		}

	unsigned int reg;

	int ret;

	u32 val;



		if (time_after(jiffies, t_start + MTK_DMA_BUSY_TIMEOUT))

			break;

	}

	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))

		reg = MTK_QDMA_GLO_CFG;

	else

		reg = MTK_PDMA_GLO_CFG;



	ret = readx_poll_timeout_atomic(__raw_readl, eth->base + reg, val,

					!(val & (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)),

					5, MTK_DMA_BUSY_TIMEOUT_US);

	if (ret)

		dev_err(eth->dev, "DMA init timeout\n");

	return -1;



	return ret;

}



static int mtk_dma_init(struct mtk_eth *eth)

drivers/net/ethernet/mediatek/mtk_eth_soc.h

+1 −1
Original line number Diff line number Diff line
@@ -214,7 +214,7 @@ 
#define MTK_TX_DMA_BUSY		BIT(1)

#define MTK_RX_DMA_EN		BIT(2)

#define MTK_TX_DMA_EN		BIT(0)

#define MTK_DMA_BUSY_TIMEOUT	HZ

#define MTK_DMA_BUSY_TIMEOUT_US	1000000



/* QDMA Reset Index Register */

#define MTK_QDMA_RST_IDX	0x1A08