Commit 3b714d24 authored by Vincenzo Frascino's avatar Vincenzo Frascino Committed by Catalin Marinas
Browse files

arm64: mte: CPU feature detection and initial sysreg configuration 



Add the cpufeature and hwcap entries to detect the presence of MTE. Any
secondary CPU not supporting the feature, if detected on the boot CPU,
will be parked.

Add the minimum SCTLR_EL1 and HCR_EL2 bits for enabling MTE. The Normal
Tagged memory type is configured in MAIR_EL1 before the MMU is enabled
in order to avoid disrupting other CPUs in the CnP domain.

Signed-off-by: default avatarVincenzo Frascino <vincenzo.frascino@arm.com>
Co-developed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>
parent 0178dc76

arch/arm64/include/asm/cpucaps.h

+2 −1
Original line number Diff line number Diff line
@@ -64,7 +64,8 @@ 
#define ARM64_BTI				54

#define ARM64_HAS_ARMv8_4_TTL			55

#define ARM64_HAS_TLB_RANGE			56

#define ARM64_MTE				57



#define ARM64_NCAPS				57

#define ARM64_NCAPS				58



#endif /* __ASM_CPUCAPS_H */

arch/arm64/include/asm/cpufeature.h

+6 −0
Original line number Diff line number Diff line
@@ -681,6 +681,12 @@ static __always_inline bool system_uses_irq_prio_masking(void) 
	       cpus_have_const_cap(ARM64_HAS_IRQ_PRIO_MASKING);

}



static inline bool system_supports_mte(void)

{

	return IS_ENABLED(CONFIG_ARM64_MTE) &&

		cpus_have_const_cap(ARM64_MTE);

}



static inline bool system_has_prio_mask_debugging(void)

{

	return IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING) &&

arch/arm64/include/asm/hwcap.h

+1 −1
Original line number Diff line number Diff line
@@ -95,7 +95,7 @@ 
#define KERNEL_HWCAP_DGH		__khwcap2_feature(DGH)

#define KERNEL_HWCAP_RNG		__khwcap2_feature(RNG)

#define KERNEL_HWCAP_BTI		__khwcap2_feature(BTI)

/* reserved for KERNEL_HWCAP_MTE	__khwcap2_feature(MTE) */

#define KERNEL_HWCAP_MTE		__khwcap2_feature(MTE)



/*

 * This yields a mask that user programs can use to figure out what

arch/arm64/include/asm/kvm_arm.h

+1 −1
Original line number Diff line number Diff line
@@ -79,7 +79,7 @@ 
			 HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_TLOR | \

			 HCR_FMO | HCR_IMO | HCR_PTW )

#define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)

#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK)

#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)

#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)



/* TCR_EL2 Registers bits */

arch/arm64/include/asm/sysreg.h

+1 −0
Original line number Diff line number Diff line
@@ -613,6 +613,7 @@ 
			 SCTLR_EL1_SA0  | SCTLR_EL1_SED  | SCTLR_ELx_I    |\

			 SCTLR_EL1_DZE  | SCTLR_EL1_UCT                   |\

			 SCTLR_EL1_NTWE | SCTLR_ELx_IESB | SCTLR_EL1_SPAN |\

			 SCTLR_ELx_ITFSB| SCTLR_ELx_ATA  | SCTLR_EL1_ATA0 |\

			 ENDIAN_SET_EL1 | SCTLR_EL1_UCI  | SCTLR_EL1_RES1)



/* MAIR_ELx memory attributes (used by Linux) */