Commit 3b5a7ca7 authored by Clément Léger's avatar Clément Léger Committed by Claudiu Beznea
Browse files

ARM: at91: setup outer cache .write_sec() callback if needed



When running under OP-TEE, the L2 cache is configured by OP-TEE and the
sam platform code does not allow any modification yet. Setup a dummy
.write_sec() callback to avoid triggering exceptions when Linux tries
to modify the L2 cache configuration.

Signed-off-by: default avatarClément Léger <clement.leger@bootlin.com>
[claudiu.beznea: keep .init_early populated only for SAMA5D2, remove
 sam_secure_init() from sama5d2_init() as it is also called in
 sama5_secure_cache_init()]
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220606145701.185552-3-clement.leger@bootlin.com
parent c71572aa
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+15 −1
Original line number Diff line number Diff line
@@ -9,13 +9,27 @@
#include <linux/of.h>
#include <linux/of_platform.h>

#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/outercache.h>
#include <asm/system_misc.h>

#include "generic.h"
#include "sam_secure.h"

static void sama5_l2c310_write_sec(unsigned long val, unsigned reg)
{
	/* OP-TEE configures the L2 cache and does not allow modifying it yet */
}

static void __init sama5_secure_cache_init(void)
{
	sam_secure_init();
	if (sam_linux_is_optee_available())
		outer_cache.write_sec = sama5_l2c310_write_sec;
}

static void __init sama5_dt_device_init(void)
{
	of_platform_default_populate(NULL, NULL, NULL);
@@ -48,7 +62,6 @@ MACHINE_END
static void __init sama5d2_init(void)
{
	of_platform_default_populate(NULL, NULL, NULL);
	sam_secure_init();
	sama5d2_pm_init();
}

@@ -60,6 +73,7 @@ static const char *const sama5d2_compat[] __initconst = {
DT_MACHINE_START(sama5d2, "Atmel SAMA5")
	/* Maintainer: Atmel */
	.init_machine	= sama5d2_init,
	.init_early	= sama5_secure_cache_init,
	.dt_compat	= sama5d2_compat,
	.l2c_aux_mask	= ~0UL,
MACHINE_END