Commit 3b3ec201 authored by Rex-BC Chen's avatar Rex-BC Chen Committed by Stephen Boyd
Browse files

clk: mediatek: reset: Add infra_ao reset support for MT8186 



The infra_ao reset is needed for MT8186.
- Add mtk_clk_rst_desc for MT8186.
- Add register reset controller function for MT8186 infra_ao.
- Add infra_ao_idx_map for MT8186.

Signed-off-by: default avatarRex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-20-rex-bc.chen@mediatek.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 2336db64

drivers/clk/mediatek/clk-mt8186-infra_ao.c

+23 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
#include <linux/clk-provider.h>

#include <linux/platform_device.h>

#include <dt-bindings/clock/mt8186-clk.h>

#include <dt-bindings/reset/mt8186-resets.h>



#include "clk-gate.h"

#include "clk-mtk.h"
@@ -191,9 +192,31 @@ static const struct mtk_gate infra_ao_clks[] = { 
	GATE_INFRA_AO3(CLK_INFRA_AO_FLASHIF_66M, "infra_ao_flashif_66m", "top_axi", 29),

};



static u16 infra_ao_rst_ofs[] = {

	INFRA_RST0_SET_OFFSET,

	INFRA_RST1_SET_OFFSET,

	INFRA_RST2_SET_OFFSET,

	INFRA_RST3_SET_OFFSET,

	INFRA_RST4_SET_OFFSET,

};



static u16 infra_ao_idx_map[] = {

	[MT8186_INFRA_THERMAL_CTRL_RST] = 0 * RST_NR_PER_BANK + 0,

	[MT8186_INFRA_PTP_CTRL_RST] = 1 * RST_NR_PER_BANK + 0,

};



static struct mtk_clk_rst_desc infra_ao_rst_desc = {

	.version = MTK_RST_SET_CLR,

	.rst_bank_ofs = infra_ao_rst_ofs,

	.rst_bank_nr = ARRAY_SIZE(infra_ao_rst_ofs),

	.rst_idx_map = infra_ao_idx_map,

	.rst_idx_map_nr = ARRAY_SIZE(infra_ao_idx_map),

};



static const struct mtk_clk_desc infra_ao_desc = {

	.clks = infra_ao_clks,

	.num_clks = ARRAY_SIZE(infra_ao_clks),

	.rst_desc = &infra_ao_rst_desc,

};



static const struct of_device_id of_match_clk_mt8186_infra_ao[] = {