Commit 3aa430d3 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue 

Tony Nguyen says:

====================
Intel Wired LAN Driver Updates 2022-02-01

This series contains updates to e1000e driver only.

Sasha removes CSME handshake with TGL platform as this is not supported
and is causing hardware unit hangs to be reported.

* '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue:
  e1000e: Handshake with CSME starts from ADL platforms
  e1000e: Separate ADP board type from TGP
====================

Link: https://lore.kernel.org/r/20220201173754.580305-1-anthony.l.nguyen@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents c7108979 cad014b7

drivers/net/ethernet/intel/e1000e/e1000.h

+3 −1
Original line number Diff line number Diff line
@@ -115,7 +115,8 @@ enum e1000_boards { 
	board_pch_lpt,

	board_pch_spt,

	board_pch_cnp,

	board_pch_tgp

	board_pch_tgp,

	board_pch_adp

};



struct e1000_ps_page {
@@ -502,6 +503,7 @@ extern const struct e1000_info e1000_pch_lpt_info; 
extern const struct e1000_info e1000_pch_spt_info;

extern const struct e1000_info e1000_pch_cnp_info;

extern const struct e1000_info e1000_pch_tgp_info;

extern const struct e1000_info e1000_pch_adp_info;

extern const struct e1000_info e1000_es2_info;



void e1000e_ptp_init(struct e1000_adapter *adapter);

drivers/net/ethernet/intel/e1000e/ich8lan.c

+20 −0
Original line number Diff line number Diff line
@@ -6021,3 +6021,23 @@ const struct e1000_info e1000_pch_tgp_info = { 
	.phy_ops		= &ich8_phy_ops,

	.nvm_ops		= &spt_nvm_ops,

};



const struct e1000_info e1000_pch_adp_info = {

	.mac			= e1000_pch_adp,

	.flags			= FLAG_IS_ICH

				  | FLAG_HAS_WOL

				  | FLAG_HAS_HW_TIMESTAMP

				  | FLAG_HAS_CTRLEXT_ON_LOAD

				  | FLAG_HAS_AMT

				  | FLAG_HAS_FLASH

				  | FLAG_HAS_JUMBO_FRAMES

				  | FLAG_APME_IN_WUC,

	.flags2			= FLAG2_HAS_PHY_STATS

				  | FLAG2_HAS_EEE,

	.pba			= 26,

	.max_hw_frame_size	= 9022,

	.get_variants		= e1000_get_variants_ich8lan,

	.mac_ops		= &ich8_mac_ops,

	.phy_ops		= &ich8_phy_ops,

	.nvm_ops		= &spt_nvm_ops,

};

drivers/net/ethernet/intel/e1000e/netdev.c

+21 −18
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ static const struct e1000_info *e1000_info_tbl[] = { 
	[board_pch_spt]		= &e1000_pch_spt_info,

	[board_pch_cnp]		= &e1000_pch_cnp_info,

	[board_pch_tgp]		= &e1000_pch_tgp_info,

	[board_pch_adp]		= &e1000_pch_adp_info,

};



struct e1000_reg_info {
@@ -6341,7 +6342,8 @@ static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter) 
	u32 mac_data;

	u16 phy_data;



	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {

	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&

	    hw->mac.type >= e1000_pch_adp) {

		/* Request ME configure the device for S0ix */

		mac_data = er32(H2ME);

		mac_data |= E1000_H2ME_START_DPG;
@@ -6490,7 +6492,8 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) 
	u16 phy_data;

	u32 i = 0;



	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {

	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&

	    hw->mac.type >= e1000_pch_adp) {

		/* Request ME unconfigure the device from S0ix */

		mac_data = er32(H2ME);

		mac_data &= ~E1000_H2ME_START_DPG;
@@ -7898,22 +7901,22 @@ static const struct pci_device_id e1000_pci_tbl[] = { 
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_tgp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_adp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_adp },



	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */

};