Commit 3aa21e79 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'bnxt_en-fixes' 



Michael Chan says:

====================
bnxt_en: 2 bug fixes.

The first one fixes a bug to properly identify some recently added HyperV
device IDs.  The second one fixes device context memory set up on systems
with 64K page size.

Please queue these for -stable as well.  Thanks.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 28c66b6d 702279d2

drivers/net/ethernet/broadcom/bnxt/bnxt.c

+3 −9
Original line number Diff line number Diff line
@@ -282,7 +282,8 @@ static bool bnxt_vf_pciid(enum board_idx idx) 
{

	return (idx == NETXTREME_C_VF || idx == NETXTREME_E_VF ||

		idx == NETXTREME_S_VF || idx == NETXTREME_C_VF_HV ||

		idx == NETXTREME_E_VF_HV || idx == NETXTREME_E_P5_VF);

		idx == NETXTREME_E_VF_HV || idx == NETXTREME_E_P5_VF ||

		idx == NETXTREME_E_P5_VF_HV);

}



#define DB_CP_REARM_FLAGS	(DB_KEY_CP | DB_IDX_VALID)
@@ -6932,17 +6933,10 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) 
static void bnxt_hwrm_set_pg_attr(struct bnxt_ring_mem_info *rmem, u8 *pg_attr,

				  __le64 *pg_dir)

{

	u8 pg_size = 0;



	if (!rmem->nr_pages)

		return;



	if (BNXT_PAGE_SHIFT == 13)

		pg_size = 1 << 4;

	else if (BNXT_PAGE_SIZE == 16)

		pg_size = 2 << 4;



	*pg_attr = pg_size;

	BNXT_SET_CTX_PAGE_ATTR(*pg_attr);

	if (rmem->depth >= 1) {

		if (rmem->depth == 2)

			*pg_attr |= 2;

drivers/net/ethernet/broadcom/bnxt/bnxt.h

+10 −0
Original line number Diff line number Diff line
@@ -1457,6 +1457,16 @@ struct bnxt_ctx_pg_info { 


#define BNXT_BACKING_STORE_CFG_LEGACY_LEN	256



#define BNXT_SET_CTX_PAGE_ATTR(attr)					\

do {									\

	if (BNXT_PAGE_SIZE == 0x2000)					\

		attr = FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_8K;	\

	else if (BNXT_PAGE_SIZE == 0x10000)				\

		attr = FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_64K;	\

	else								\

		attr = FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_4K;	\

} while (0)



struct bnxt_ctx_mem_info {

	u32	qp_max_entries;

	u16	qp_min_qp1_entries;