Commit 3a43e30b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-msm-fixes-2023-03-09' of https://gitlab.freedesktop.org/drm/msm into drm-fixes 



msm-fixes for v6.3-rc2

- Fix for possible invalid ptr free in submit ioctl syncobj cleanup path.
- Synchronize GMU removal in driver teardown path
- a5xx preemption fixes
- Fix runpm imbalance at unbind
- DPU hw catalog fixes:
 - set DPU_MDP_PERIPH_0_REMOVED for sc8280xp as this is another chipset
   where the PERIPH_0 block of registers is not there
 - fix the DPU features supported in QCM2290 by comparing it with the
   downstream device tree
 - fix the length of registers in the sc7180_ctl from 0xe4 to 0x1dc
 - fix the max mixer line width for sm6115 and qcm2290 chipsets in the
   DPU catalog
 - fix the scaler version on sm8550, sc8280xp, sm8450, sm8250, sm8350
   and sm6115. This was incorrectly populated on the SW version of the
   scaler library and  not the scaler HW version
 - Drop dim layer support for msm8998 as its not indicated to be
   supported in the downstream DTSI
 - fix the DPU_CLK_CTRL bits for msm 8998 sspp blocks
 - Use DPU_CLK_CTRL_DMA* prefix instead of DPU_CLK_CTRL_CURSOR*
   for all chipsets for the DMA sspp blocks
 - fix the ping-pong block base address for sc7280 in the DPU HW catalog
- Fix stack corruption issue in the dpu_hw_ctl_setup_blendstage() function
  as it was causing a negative left shift by protecting against an invalid
  index
- Clear the DSPP reservations in dpu_rm_release(). This was missed out and
  as as result the DSPP was not released from the resource manager global
  state.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvH+VH_Wx3mFMG51CMnoiU06CM-+-WMhM73M42Qx7Bp4A@mail.gmail.com
parents b2bda460 a722511b

drivers/gpu/drm/msm/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -23,7 +23,6 @@ config DRM_MSM 
	select SHMEM

	select TMPFS

	select QCOM_SCM

	select DEVFREQ_GOV_SIMPLE_ONDEMAND

	select WANT_DEV_COREDUMP

	select SND_SOC_HDMI_CODEC if SND_SOC

	select SYNC_FILE

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+3 −3
Original line number Diff line number Diff line
@@ -151,8 +151,8 @@ static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) 
	OUT_RING(ring, 1);



	/* Enable local preemption for finegrain preemption */

	OUT_PKT7(ring, CP_PREEMPT_ENABLE_GLOBAL, 1);

	OUT_RING(ring, 0x02);

	OUT_PKT7(ring, CP_PREEMPT_ENABLE_LOCAL, 1);

	OUT_RING(ring, 0x1);



	/* Allow CP_CONTEXT_SWITCH_YIELD packets in the IB2 */

	OUT_PKT7(ring, CP_YIELD_ENABLE, 1);
@@ -806,7 +806,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu) 
	gpu_write(gpu, REG_A5XX_RBBM_AHB_CNTL2, 0x0000003F);



	/* Set the highest bank bit */

	if (adreno_is_a540(adreno_gpu))

	if (adreno_is_a540(adreno_gpu) || adreno_is_a530(adreno_gpu))

		regbit = 2;

	else

		regbit = 1;

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

+2 −2
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) 
		struct msm_ringbuffer *ring = gpu->rb[i];



		spin_lock_irqsave(&ring->preempt_lock, flags);

		empty = (get_wptr(ring) == ring->memptrs->rptr);

		empty = (get_wptr(ring) == gpu->funcs->get_rptr(gpu, ring));

		spin_unlock_irqrestore(&ring->preempt_lock, flags);



		if (!empty)
@@ -207,6 +207,7 @@ void a5xx_preempt_hw_init(struct msm_gpu *gpu) 
		a5xx_gpu->preempt[i]->wptr = 0;

		a5xx_gpu->preempt[i]->rptr = 0;

		a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova;

		a5xx_gpu->preempt[i]->rptr_addr = shadowptr(a5xx_gpu, gpu->rb[i]);

	}



	/* Write a 0 to signal that we aren't switching pagetables */
@@ -257,7 +258,6 @@ static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu, 
	ptr->data = 0;

	ptr->cntl = MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE;



	ptr->rptr_addr = shadowptr(a5xx_gpu, ring);

	ptr->counter = counters_iova;



	return 0;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

+1 −1
Original line number Diff line number Diff line
@@ -974,7 +974,7 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) 
	int status, ret;



	if (WARN(!gmu->initialized, "The GMU is not set up yet\n"))

		return 0;

		return -EINVAL;



	gmu->hung = false;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+2 −0
Original line number Diff line number Diff line
@@ -1746,7 +1746,9 @@ static void a6xx_destroy(struct msm_gpu *gpu) 


	a6xx_llc_slices_destroy(a6xx_gpu);



	mutex_lock(&a6xx_gpu->gmu.lock);

	a6xx_gmu_remove(a6xx_gpu);

	mutex_unlock(&a6xx_gpu->gmu.lock);



	adreno_gpu_cleanup(adreno_gpu);