Commit 3a4347d8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 

Pull clk fix from Stephen Boyd:
 "One fix for the composite clk that broke when we changed this clk type
  to use the determine_rate instead of round_rate clk op by default.
  This caused lots of problems on Rockchip SoCs because they heavily use
  the composite clk code to model the clk tree"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: composite: Also consider .determine_rate for rate + mux composites
parents bf85ba01 675c496d

drivers/clk/clk-composite.c

+5 −5
Original line number Diff line number Diff line
@@ -58,10 +58,7 @@ static int clk_composite_determine_rate(struct clk_hw *hw, 
	long rate;

	int i;



	if (rate_hw && rate_ops && rate_ops->determine_rate) {

		__clk_hw_set_clk(rate_hw, hw);

		return rate_ops->determine_rate(rate_hw, req);

	} else if (rate_hw && rate_ops && rate_ops->round_rate &&

	if (rate_hw && rate_ops && rate_ops->round_rate &&

	    mux_hw && mux_ops && mux_ops->set_parent) {

		req->best_parent_hw = NULL;
@@ -107,6 +104,9 @@ static int clk_composite_determine_rate(struct clk_hw *hw, 


		req->rate = best_rate;

		return 0;

	} else if (rate_hw && rate_ops && rate_ops->determine_rate) {

		__clk_hw_set_clk(rate_hw, hw);

		return rate_ops->determine_rate(rate_hw, req);

	} else if (mux_hw && mux_ops && mux_ops->determine_rate) {

		__clk_hw_set_clk(mux_hw, hw);

		return mux_ops->determine_rate(mux_hw, req);