Unverified Commit 3a00b1c4 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'amlogic-drivers-for-v6.5' of... 

Merge tag 'amlogic-drivers-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers

Amlogic Drivers changes for v6.5:
- tag some powers domains as always-on for secure-pwrc
- fix MAINTAINERS entry for PHY drivers & bindings
- Amlogic Meson GPIO interrupt controller binding to yaml conversion

* tag 'amlogic-drivers-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding
  MAINTAINERS: add PHY-related files to Amlogic SoC file list
  drivers: meson: secure-pwrc: always enable DMA domain

Link: https://lore.kernel.org/r/a10ea420-7599-3f41-dfd8-1742ef436ca0@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 0feedcaa 6b0139b3

Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt

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Amlogic meson GPIO interrupt controller



Meson SoCs contains an interrupt controller which is able to watch the SoC

pads and generate an interrupt on edge or level. The controller is essentially

a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge

or level and polarity. It does not expose all 256 mux inputs because the

documentation shows that the upper part is not mapped to any pad. The actual

number of interrupt exposed depends on the SoC.



Required properties:



- compatible : must have "amlogic,meson8-gpio-intc" and either

    "amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or

    "amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or

    "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or

    "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912)

    "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X)

    "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2)

    "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3)

    "amlogic,meson-a1-gpio-intc" for A1 SoCs (A113L)

    "amlogic,meson-s4-gpio-intc" for S4 SoCs (S802X2, S905Y4, S805X2G, S905W2)

- reg : Specifies base physical address and size of the registers.

- interrupt-controller : Identifies the node as an interrupt controller.

- #interrupt-cells : Specifies the number of cells needed to encode an

   interrupt source. The value must be 2.

- meson,channel-interrupts: Array with the 8 upstream hwirq numbers. These

   are the hwirqs used on the parent interrupt controller.



Example:



gpio_interrupt: interrupt-controller@9880 {

	compatible = "amlogic,meson-gxbb-gpio-intc",

		     "amlogic,meson-gpio-intc";

	reg = <0x0 0x9880 0x0 0x10>;

	interrupt-controller;

	#interrupt-cells = <2>;

	meson,channel-interrupts = <64 65 66 67 68 69 70 71>;

};

Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/amlogic,meson-gpio-intc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic Meson GPIO interrupt controller



maintainers:

  - Heiner Kallweit <hkallweit1@gmail.com>



description: |

  Meson SoCs contains an interrupt controller which is able to watch the SoC

  pads and generate an interrupt on edge or level. The controller is essentially

  a 256 pads to 8 or 12 GIC interrupt multiplexer, with a filter block to select

  edge or level and polarity. It does not expose all 256 mux inputs because the

  documentation shows that the upper part is not mapped to any pad. The actual

  number of interrupts exposed depends on the SoC.



allOf:

  - $ref: /schemas/interrupt-controller.yaml#



properties:

  compatible:

    oneOf:

      - const: amlogic,meson-gpio-intc

      - items:

          - enum:

              - amlogic,meson8-gpio-intc

              - amlogic,meson8b-gpio-intc

              - amlogic,meson-gxbb-gpio-intc

              - amlogic,meson-gxl-gpio-intc

              - amlogic,meson-axg-gpio-intc

              - amlogic,meson-g12a-gpio-intc

              - amlogic,meson-sm1-gpio-intc

              - amlogic,meson-a1-gpio-intc

              - amlogic,meson-s4-gpio-intc

          - const: amlogic,meson-gpio-intc



  reg:

    maxItems: 1



  interrupt-controller: true



  "#interrupt-cells":

    const: 2



  amlogic,channel-interrupts:

    description: Array with the upstream hwirq numbers

    minItems: 8

    maxItems: 12

    $ref: /schemas/types.yaml#/definitions/uint32-array



required:

  - compatible

  - reg

  - interrupt-controller

  - "#interrupt-cells"

  - amlogic,channel-interrupts



additionalProperties: false



examples:

  - |

    interrupt-controller@9880 {

      compatible = "amlogic,meson-gxbb-gpio-intc",

                   "amlogic,meson-gpio-intc";

      reg = <0x9880 0x10>;

      interrupt-controller;

      #interrupt-cells = <2>;

      amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;

    };

MAINTAINERS

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@@ -1910,10 +1910,12 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 
L:	linux-amlogic@lists.infradead.org

S:	Maintained

W:	http://linux-meson.com/

F:	Documentation/devicetree/bindings/phy/amlogic*

F:	arch/arm/boot/dts/meson*

F:	arch/arm/mach-meson/

F:	arch/arm64/boot/dts/amlogic/

F:	drivers/mmc/host/meson*

F:	drivers/phy/amlogic/

F:	drivers/pinctrl/meson/

F:	drivers/rtc/rtc-meson*

F:	drivers/soc/amlogic/

drivers/soc/amlogic/meson-secure-pwrc.c

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@@ -105,7 +105,7 @@ static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = { 
	SEC_PD(ACODEC,	0),

	SEC_PD(AUDIO,	0),

	SEC_PD(OTP,	0),

	SEC_PD(DMA,	0),

	SEC_PD(DMA,	GENPD_FLAG_ALWAYS_ON | GENPD_FLAG_IRQ_SAFE),

	SEC_PD(SD_EMMC,	0),

	SEC_PD(RAMA,	0),

	/* SRAMB is used as ATF runtime memory, and should be always on */