Commit 39e77c48 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "Some hot fixes for clk driver patches merged last week and one oops
  fix:

   - Fix license on recent MediaTek drivers

   - Initialize a variable before use in the new Visconti driver

   - Avoid an oops by unregistering the clk provider in si5341"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: mediatek: relicense mt7986 clock driver to GPL-2.0
  clk: visconti: Fix uninitialized variable in printk
  clk: si5341: Fix clock HW provider cleanup
parents 4141a5e6 b4966a7d
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@@ -1740,7 +1740,7 @@ static int si5341_probe(struct i2c_client *client,
			clk_prepare(data->clk[i].hw.clk);
	}

	err = of_clk_add_hw_provider(client->dev.of_node, of_clk_si5341_get,
	err = devm_of_clk_add_hw_provider(&client->dev, of_clk_si5341_get,
			data);
	if (err) {
		dev_err(&client->dev, "unable to add clk provider\n");
+1 −1
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// SPDX-License-Identifier: GPL-1.0
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2021 MediaTek Inc.
 * Author: Sam Shih <sam.shih@mediatek.com>
+1 −1
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// SPDX-License-Identifier: GPL-1.0
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2021 MediaTek Inc.
 * Author: Sam Shih <sam.shih@mediatek.com>
+1 −1
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// SPDX-License-Identifier: GPL-1.0
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2021 MediaTek Inc.
 * Author: Sam Shih <sam.shih@mediatek.com>
+1 −2
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@@ -246,7 +246,6 @@ static struct clk_hw *visconti_register_pll(struct visconti_pll_provider *ctx,
{
	struct clk_init_data init;
	struct visconti_pll *pll;
	struct clk *pll_clk;
	struct clk_hw *pll_hw_clk;
	size_t len;
	int ret;
@@ -277,7 +276,7 @@ static struct clk_hw *visconti_register_pll(struct visconti_pll_provider *ctx,
	pll_hw_clk = &pll->hw;
	ret = clk_hw_register(NULL, &pll->hw);
	if (ret) {
		pr_err("failed to register pll clock %s : %ld\n", name, PTR_ERR(pll_clk));
		pr_err("failed to register pll clock %s : %d\n", name, ret);
		kfree(pll);
		pll_hw_clk = ERR_PTR(ret);
	}