Commit 3919430f authored by Borislav Petkov (AMD)'s avatar Borislav Petkov (AMD)
Browse files

Merge branches 'edac-ghes' and 'edac-misc' into edac-updates-for-v6.2 



Combine all queued EDAC changes for submission into v6.2:

* ras/edac-ghes:
  EDAC/igen6: Return the correct error type when not the MC owner
  apei/ghes: Use xchg_release() for updating new cache slot instead of cmpxchg()
  EDAC: Check for GHES preference in the chipset-specific EDAC drivers
  EDAC/ghes: Make ghes_edac a proper module
  EDAC/ghes: Prepare to make ghes_edac a proper module
  EDAC/ghes: Add a notifier for reporting memory errors
  efi/cper: Export several helpers for ghes_edac to use

* ras/edac-misc:
  EDAC/i10nm: fix refcount leak in pci_get_dev_wrapper()
  EDAC/i5400: Fix typo in comment: vaious -> various
  EDAC/mc_sysfs: Increase legacy channel support to 12
  MAINTAINERS: Make Mauro EDAC reviewer
  MAINTAINERS: Make Manivannan Sadhasivam the maintainer of qcom_edac
  EDAC/i5000: Mark as BROKEN

Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
parents f5e32344 9c892155

MAINTAINERS

+2 −3
Original line number Diff line number Diff line
@@ -7356,9 +7356,9 @@ F: drivers/edac/thunderx_edac* 








EDAC-CORE









M:	Borislav Petkov <bp@alien8.de>









M:	Mauro Carvalho Chehab <mchehab@kernel.org>









M:	Tony Luck <tony.luck@intel.com>









R:	James Morse <james.morse@arm.com>









R:	Mauro Carvalho Chehab <mchehab@kernel.org>









R:	Robert Richter <rric@kernel.org>









L:	linux-edac@vger.kernel.org









S:	Supported








@@ -7475,8 +7475,7 @@ S:	Maintained







F:	drivers/edac/pnd2_edac.[ch]

















EDAC-QCOM









M:	Channagoud Kadabi <ckadabi@codeaurora.org>









M:	Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>









M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>









L:	linux-arm-msm@vger.kernel.org









L:	linux-edac@vger.kernel.org









S:	Maintained
































drivers/edac/Kconfig



+1
−0






























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@@ -211,6 +211,7 @@ config EDAC_R82600







config EDAC_I5000









	tristate "Intel Greencreek/Blackford chipset"









	depends on X86 && PCI









	depends on BROKEN









	help









	  Support for error detection and correction the Intel









	  Greekcreek/Blackford chipsets.
































drivers/edac/edac_mc_sysfs.c



+24
−0






























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Diff line number
Diff line







@@ -298,6 +298,14 @@ DEVICE_CHANNEL(ch6_dimm_label, S_IRUGO | S_IWUSR,







	channel_dimm_label_show, channel_dimm_label_store, 6);









DEVICE_CHANNEL(ch7_dimm_label, S_IRUGO | S_IWUSR,









	channel_dimm_label_show, channel_dimm_label_store, 7);









DEVICE_CHANNEL(ch8_dimm_label, S_IRUGO | S_IWUSR,









	channel_dimm_label_show, channel_dimm_label_store, 8);









DEVICE_CHANNEL(ch9_dimm_label, S_IRUGO | S_IWUSR,









	channel_dimm_label_show, channel_dimm_label_store, 9);









DEVICE_CHANNEL(ch10_dimm_label, S_IRUGO | S_IWUSR,









	channel_dimm_label_show, channel_dimm_label_store, 10);









DEVICE_CHANNEL(ch11_dimm_label, S_IRUGO | S_IWUSR,









	channel_dimm_label_show, channel_dimm_label_store, 11);



















/* Total possible dynamic DIMM Label attribute file table */









static struct attribute *dynamic_csrow_dimm_attr[] = {








@@ -309,6 +317,10 @@ static struct attribute *dynamic_csrow_dimm_attr[] = {







	&dev_attr_legacy_ch5_dimm_label.attr.attr,









	&dev_attr_legacy_ch6_dimm_label.attr.attr,









	&dev_attr_legacy_ch7_dimm_label.attr.attr,









	&dev_attr_legacy_ch8_dimm_label.attr.attr,









	&dev_attr_legacy_ch9_dimm_label.attr.attr,









	&dev_attr_legacy_ch10_dimm_label.attr.attr,









	&dev_attr_legacy_ch11_dimm_label.attr.attr,









	NULL









};


















@@ -329,6 +341,14 @@ DEVICE_CHANNEL(ch6_ce_count, S_IRUGO,







		   channel_ce_count_show, NULL, 6);









DEVICE_CHANNEL(ch7_ce_count, S_IRUGO,









		   channel_ce_count_show, NULL, 7);









DEVICE_CHANNEL(ch8_ce_count, S_IRUGO,









		   channel_ce_count_show, NULL, 8);









DEVICE_CHANNEL(ch9_ce_count, S_IRUGO,









		   channel_ce_count_show, NULL, 9);









DEVICE_CHANNEL(ch10_ce_count, S_IRUGO,









		   channel_ce_count_show, NULL, 10);









DEVICE_CHANNEL(ch11_ce_count, S_IRUGO,









		   channel_ce_count_show, NULL, 11);



















/* Total possible dynamic ce_count attribute file table */









static struct attribute *dynamic_csrow_ce_count_attr[] = {








@@ -340,6 +360,10 @@ static struct attribute *dynamic_csrow_ce_count_attr[] = {







	&dev_attr_legacy_ch5_ce_count.attr.attr,









	&dev_attr_legacy_ch6_ce_count.attr.attr,









	&dev_attr_legacy_ch7_ce_count.attr.attr,









	&dev_attr_legacy_ch8_ce_count.attr.attr,









	&dev_attr_legacy_ch9_ce_count.attr.attr,









	&dev_attr_legacy_ch10_ce_count.attr.attr,









	&dev_attr_legacy_ch11_ce_count.attr.attr,









	NULL









};










































drivers/edac/i10nm_base.c



+1
−2






























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@@ -304,11 +304,10 @@ static struct pci_dev *pci_get_dev_wrapper(int dom, unsigned int bus,







	if (unlikely(pci_enable_device(pdev) < 0)) {









		edac_dbg(2, "Failed to enable device %02x:%02x.%x\n",









			 bus, dev, fun);









		pci_dev_put(pdev);









		return NULL;









	}



















	pci_dev_get(pdev);



















	return pdev;









}










































drivers/edac/i5400_edac.c



+2
−1






























Original line number
Diff line number
Diff line







@@ -279,7 +279,8 @@ static inline int from_nf_ferr(unsigned int mask)







#define FERR_NF_RECOVERABLE	to_nf_mask(ERROR_NF_RECOVERABLE)









#define FERR_NF_UNCORRECTABLE	to_nf_mask(ERROR_NF_UNCORRECTABLE)



















/* Defines to extract the vaious fields from the









/*









 * Defines to extract the various fields from the









 *	MTRx - Memory Technology Registers









 */









#define MTR_DIMMS_PRESENT(mtr)		((mtr) & (1 << 10))