Commit 38c6663a authored by Len Brown's avatar Len Brown
Browse files

tools/power turbostat: elevate priority of interval mode



This makes interval mode less likely to see delayed
results on a heavily loaded system.

Signed-off-by: default avatarLen Brown <len.brown@intel.com>
parent 1b439f01
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+57 −9
Original line number Diff line number Diff line
@@ -2266,31 +2266,48 @@ char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",

int nhm_pkg_cstate_limits[16] =
    { PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCLRSV, PCLRSV };
	PCLRSV, PCLRSV
};

int snb_pkg_cstate_limits[16] =
    { PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCLRSV, PCLRSV };
	PCLRSV, PCLRSV
};

int hsw_pkg_cstate_limits[16] =
    { PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCLRSV, PCLRSV };
	PCLRSV, PCLRSV
};

int slv_pkg_cstate_limits[16] =
    { PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCL__6, PCL__7 };
	PCL__6, PCL__7
};

int amt_pkg_cstate_limits[16] =
    { PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCLRSV, PCLRSV };
	PCLRSV, PCLRSV
};

int phi_pkg_cstate_limits[16] =
    { PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCLRSV, PCLRSV };
	PCLRSV, PCLRSV
};

int glm_pkg_cstate_limits[16] =
    { PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCLRSV, PCLRSV };
	PCLRSV, PCLRSV
};

int skx_pkg_cstate_limits[16] =
    { PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCLRSV, PCLRSV };
	PCLRSV, PCLRSV
};

int icx_pkg_cstate_limits[16] =
    { PCL__0, PCL__2, PCL__6, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,
PCLRSV, PCLRSV };
	PCLRSV, PCLRSV
};

static void calculate_tsc_tweak()
{
@@ -3401,6 +3418,32 @@ void msr_sum_record(void)
	free(per_cpu_msr_sum);
}

/*
 * set_my_sched_priority(pri)
 * return previous
 */
int set_my_sched_priority(int priority)
{
	int retval;
	int original_priority;

	errno = 0;
	original_priority = getpriority(PRIO_PROCESS, 0);
	if (errno && (original_priority == -1))
		err(errno, "getpriority");

	retval = setpriority(PRIO_PROCESS, 0, priority);
	if (retval)
		err(retval, "setpriority(%d)", priority);

	errno = 0;
	retval = getpriority(PRIO_PROCESS, 0);
	if (retval != priority)
		err(-1, "getpriority(%d) != setpriority(%d)", retval, priority);

	return original_priority;
}

void turbostat_loop()
{
	int retval;
@@ -3409,6 +3452,11 @@ void turbostat_loop()

	setup_signal_handler();

	/*
	 * elevate own priority for interval mode
	 */
	set_my_sched_priority(-20);

restart:
	restarted++;