Commit 387df878 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.0-2022-09-21' of...

Merge tag 'amd-drm-fixes-6.0-2022-09-21' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.0-2022-09-21:

amdgpu:
- SDMA 6.x fix
- GPUVM TF fix
- DCN 3.2.x fixes
- DCN 3.1.x fixes
- SMU 13.x fixes
- Clang stack size fixes for recently enabled DML code
- Fix drm dirty callback change on non-atomic cases
- USB4 display fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220921220605.6136-1-alexander.deucher@amd.com
parents d21fc111 f525ed19
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+10 −1
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@
#include <linux/pm_runtime.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_damage_helper.h>
#include <drm/drm_drv.h>
#include <drm/drm_edid.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_fb_helper.h>
@@ -497,6 +498,11 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector *amdgpu_connector,
static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
	.destroy = drm_gem_fb_destroy,
	.create_handle = drm_gem_fb_create_handle,
};

static const struct drm_framebuffer_funcs amdgpu_fb_funcs_atomic = {
	.destroy = drm_gem_fb_destroy,
	.create_handle = drm_gem_fb_create_handle,
	.dirty = drm_atomic_helper_dirtyfb,
};

@@ -1102,6 +1108,9 @@ static int amdgpu_display_gem_fb_verify_and_init(struct drm_device *dev,
	if (ret)
		goto err;

	if (drm_drv_uses_atomic_modeset(dev))
		ret = drm_framebuffer_init(dev, &rfb->base, &amdgpu_fb_funcs_atomic);
	else
		ret = drm_framebuffer_init(dev, &rfb->base, &amdgpu_fb_funcs);
	if (ret)
		goto err;
+3 −0
Original line number Diff line number Diff line
@@ -181,6 +181,9 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
	for (i = 0; i < AMDGPU_MES_MAX_SDMA_PIPES; i++) {
		if (adev->ip_versions[SDMA0_HWIP][0] < IP_VERSION(6, 0, 0))
			adev->mes.sdma_hqd_mask[i] = i ? 0 : 0x3fc;
		/* zero sdma_hqd_mask for non-existent engine */
		else if (adev->sdma.num_instances == 1)
			adev->mes.sdma_hqd_mask[i] = i ? 0 : 0xfc;
		else
			adev->mes.sdma_hqd_mask[i] = 0xfc;
	}
+1 −2
Original line number Diff line number Diff line
@@ -2484,8 +2484,7 @@ bool amdgpu_vm_handle_fault(struct amdgpu_device *adev, u32 pasid,
		/* Intentionally setting invalid PTE flag
		 * combination to force a no-retry-fault
		 */
		flags = AMDGPU_PTE_EXECUTABLE | AMDGPU_PDE_PTE |
			AMDGPU_PTE_TF;
		flags = AMDGPU_PTE_SNOOPED | AMDGPU_PTE_PRT;
		value = 0;
	} else if (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_NEVER) {
		/* Redirect the access to the dummy page */
+5 −2
Original line number Diff line number Diff line
@@ -1103,12 +1103,15 @@ static void gmc_v9_0_get_vm_pde(struct amdgpu_device *adev, int level,
			*flags |= AMDGPU_PDE_BFS(0x9);

	} else if (level == AMDGPU_VM_PDB0) {
		if (*flags & AMDGPU_PDE_PTE)
		if (*flags & AMDGPU_PDE_PTE) {
			*flags &= ~AMDGPU_PDE_PTE;
		else
			if (!(*flags & AMDGPU_PTE_VALID))
				*addr |= 1 << PAGE_SHIFT;
		} else {
			*flags |= AMDGPU_PTE_TF;
		}
	}
}

static void gmc_v9_0_get_vm_pte(struct amdgpu_device *adev,
				struct amdgpu_bo_va_mapping *mapping,
+10 −2
Original line number Diff line number Diff line
@@ -4759,7 +4759,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,
	plane_info->visible = true;
	plane_info->stereo_format = PLANE_STEREO_FORMAT_NONE;

	plane_info->layer_index = 0;
	plane_info->layer_index = plane_state->normalized_zpos;

	ret = fill_plane_color_attributes(plane_state, plane_info->format,
					  &plane_info->color_space);
@@ -4827,7 +4827,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev,
	dc_plane_state->global_alpha = plane_info.global_alpha;
	dc_plane_state->global_alpha_value = plane_info.global_alpha_value;
	dc_plane_state->dcc = plane_info.dcc;
	dc_plane_state->layer_index = plane_info.layer_index; // Always returns 0
	dc_plane_state->layer_index = plane_info.layer_index;
	dc_plane_state->flip_int_enabled = true;

	/*
@@ -9485,6 +9485,14 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
		}
	}

	/*
	 * DC consults the zpos (layer_index in DC terminology) to determine the
	 * hw plane on which to enable the hw cursor (see
	 * `dcn10_can_pipe_disable_cursor`). By now, all modified planes are in
	 * atomic state, so call drm helper to normalize zpos.
	 */
	drm_atomic_normalize_zpos(dev, state);

	/* Remove exiting planes if they are modified */
	for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) {
		ret = dm_update_plane_state(dc, state, plane,
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