Commit 387b3bba authored by Tianling Shen's avatar Tianling Shen Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS 



The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and otherwise
identical to OrangePi R1 Plus.

Signed-off-by: default avatarTianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20230325074022.9818-5-cnsztl@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 564cfdb8

arch/arm64/boot/dts/rockchip/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb 
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb

arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts

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+40 −0
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/*

 * Copyright (c) 2016 Xunlong Software. Co., Ltd.

 * (http://www.orangepi.org)

 *

 * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>

 */



/dts-v1/;

#include "rk3328-orangepi-r1-plus.dts"



/ {

	model = "Xunlong Orange Pi R1 Plus LTS";

	compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";

};



&gmac2io {

	phy-handle = <&yt8531c>;

	tx_delay = <0x19>;

	rx_delay = <0x05>;



	mdio {

		/delete-node/ ethernet-phy@1;



		yt8531c: ethernet-phy@0 {

			compatible = "ethernet-phy-ieee802.3-c22";

			reg = <0>;



			motorcomm,clk-out-frequency-hz = <125000000>;

			motorcomm,keep-pll-enabled;

			motorcomm,auto-sleep-disabled;



			pinctrl-0 = <&eth_phy_reset_pin>;

			pinctrl-names = "default";

			reset-assert-us = <15000>;

			reset-deassert-us = <50000>;

			reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;

		};

	};

};