Commit 38669e04 authored by Pawel Moll's avatar Pawel Moll
Browse files

ARM: vexpress: Start using new Versatile Express infrastructure



This patch starts using all the configuration infrastructure.

- generic GPIO library is forced now

- sysreg GPIOs are used as MMC CD and WP information sources;
  thanks to this MMCI auxiliary data is not longer necessary

- DVI muxer and mode control is removed from non-DT V2P-CA9 code
  as this is now handled by the vexpress-dvi driver

- clock generators control is removed as is being handled by the
  common clock driver now

- the sysreg and sysctl control is now delegated to the
  appropriate drivers and all related code was removed

- NOR Flash set_vpp function has been removed as the control
  bit used does _not_ control its VPP line, but the #WP signal
  instead (which is de facto unusable in case of Linux MTD
  drivers); this also allowed the remove its DT auxiliary
  data

The non-DT code defines only minimal required number of
the config devices. Device Trees are updated to make use
of all new features.

Signed-off-by: default avatarPawel Moll <pawel.moll@arm.com>
parent 842839a3
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+0 −6
Original line number Original line Diff line number Diff line
@@ -50,12 +50,6 @@
#define SCPCELLID2		0xFF8
#define SCPCELLID2		0xFF8
#define SCPCELLID3		0xFFC
#define SCPCELLID3		0xFFC


#define SCCTRL_TIMEREN0SEL_REFCLK	(0 << 15)
#define SCCTRL_TIMEREN0SEL_TIMCLK	(1 << 15)

#define SCCTRL_TIMEREN1SEL_REFCLK	(0 << 17)
#define SCCTRL_TIMEREN1SEL_TIMCLK	(1 << 17)

#define SCCTRL_TIMERENnSEL_SHIFT(n)	(15 + ((n) * 2))
#define SCCTRL_TIMERENnSEL_SHIFT(n)	(15 + ((n) * 2))


static inline void sysctl_soft_reset(void __iomem *base)
static inline void sysctl_soft_reset(void __iomem *base)
+3 −1
Original line number Original line Diff line number Diff line
config ARCH_VEXPRESS
config ARCH_VEXPRESS
	bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7
	bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7
	select ARCH_WANT_OPTIONAL_GPIOLIB
	select ARCH_REQUIRE_GPIOLIB
	select ARM_AMBA
	select ARM_AMBA
	select ARM_GIC
	select ARM_GIC
	select ARM_TIMER_SP804
	select ARM_TIMER_SP804
	select CLKDEV_LOOKUP
	select CLKDEV_LOOKUP
	select COMMON_CLK
	select COMMON_CLK
	select COMMON_CLK_VERSATILE
	select CPU_V7
	select CPU_V7
	select GENERIC_CLOCKEVENTS
	select GENERIC_CLOCKEVENTS
	select HAVE_CLK
	select HAVE_CLK
@@ -17,6 +18,7 @@ config ARCH_VEXPRESS
	select PLAT_VERSATILE
	select PLAT_VERSATILE
	select PLAT_VERSATILE_CLCD
	select PLAT_VERSATILE_CLCD
	select REGULATOR_FIXED_VOLTAGE if REGULATOR
	select REGULATOR_FIXED_VOLTAGE if REGULATOR
	select VEXPRESS_CONFIG
	help
	help
	  This option enables support for systems using Cortex processor based
	  This option enables support for systems using Cortex processor based
	  ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
	  ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
+1 −1
Original line number Original line Diff line number Diff line
@@ -4,7 +4,7 @@
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
	-I$(srctree)/arch/arm/plat-versatile/include
	-I$(srctree)/arch/arm/plat-versatile/include


obj-y					:= v2m.o
obj-y					:= v2m.o reset.o
obj-$(CONFIG_ARCH_VEXPRESS_CA9X4)	+= ct-ca9x4.o
obj-$(CONFIG_ARCH_VEXPRESS_CA9X4)	+= ct-ca9x4.o
obj-$(CONFIG_SMP)			+= platsmp.o
obj-$(CONFIG_SMP)			+= platsmp.o
obj-$(CONFIG_HOTPLUG_CPU)		+= hotplug.o
obj-$(CONFIG_HOTPLUG_CPU)		+= hotplug.o
+14 −27
Original line number Original line Diff line number Diff line
@@ -9,6 +9,7 @@
#include <linux/amba/bus.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <linux/amba/clcd.h>
#include <linux/clkdev.h>
#include <linux/clkdev.h>
#include <linux/vexpress.h>


#include <asm/hardware/arm_timer.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/cache-l2x0.h>
@@ -64,19 +65,6 @@ static void __init ct_ca9x4_init_irq(void)
	ca9x4_twd_init();
	ca9x4_twd_init();
}
}


static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
{
	u32 site = v2m_get_master_site();

	/*
	 * Old firmware was using the "site" component of the command
	 * to control the DVI muxer (while it should be always 0 ie. MB).
	 * Newer firmware uses the data register. Keep both for compatibility.
	 */
	v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE(site), site);
	v2m_cfg_write(SYS_CFG_DVIMODE | SYS_CFG_SITE(SYS_CFG_SITE_MB), 2);
}

static int ct_ca9x4_clcd_setup(struct clcd_fb *fb)
static int ct_ca9x4_clcd_setup(struct clcd_fb *fb)
{
{
	unsigned long framesize = 1024 * 768 * 2;
	unsigned long framesize = 1024 * 768 * 2;
@@ -93,7 +81,6 @@ static struct clcd_board ct_ca9x4_clcd_data = {
	.caps		= CLCD_CAP_5551 | CLCD_CAP_565,
	.caps		= CLCD_CAP_5551 | CLCD_CAP_565,
	.check		= clcdfb_check,
	.check		= clcdfb_check,
	.decode		= clcdfb_decode,
	.decode		= clcdfb_decode,
	.enable		= ct_ca9x4_clcd_enable,
	.setup		= ct_ca9x4_clcd_setup,
	.setup		= ct_ca9x4_clcd_setup,
	.mmap		= versatile_clcd_mmap_dma,
	.mmap		= versatile_clcd_mmap_dma,
	.remove		= versatile_clcd_remove_dma,
	.remove		= versatile_clcd_remove_dma,
@@ -111,14 +98,6 @@ static struct amba_device *ct_ca9x4_amba_devs[] __initdata = {
	&gpio_device,
	&gpio_device,
};
};



static struct v2m_osc ct_osc1 = {
	.osc = 1,
	.rate_min = 10000000,
	.rate_max = 80000000,
	.rate_default = 23750000,
};

static struct resource pmu_resources[] = {
static struct resource pmu_resources[] = {
	[0] = {
	[0] = {
		.start	= IRQ_CT_CA9X4_PMU_CPU0,
		.start	= IRQ_CT_CA9X4_PMU_CPU0,
@@ -149,10 +128,18 @@ static struct platform_device pmu_device = {
	.resource	= pmu_resources,
	.resource	= pmu_resources,
};
};


static struct platform_device osc1_device = {
	.name		= "vexpress-osc",
	.id		= 1,
	.num_resources	= 1,
	.resource	= (struct resource []) {
		VEXPRESS_RES_FUNC(0xf, 1),
	},
};

static void __init ct_ca9x4_init(void)
static void __init ct_ca9x4_init(void)
{
{
	int i;
	int i;
	struct clk *clk;


#ifdef CONFIG_CACHE_L2X0
#ifdef CONFIG_CACHE_L2X0
	void __iomem *l2x0_base = ioremap(CT_CA9X4_L2CC, SZ_4K);
	void __iomem *l2x0_base = ioremap(CT_CA9X4_L2CC, SZ_4K);
@@ -164,14 +151,14 @@ static void __init ct_ca9x4_init(void)
	l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
	l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
#endif
#endif


	ct_osc1.site = v2m_get_master_site();
	clk = v2m_osc_register("ct:osc1", &ct_osc1);
	clk_register_clkdev(clk, NULL, "ct:clcd");

	for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
	for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
		amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);
		amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);


	platform_device_register(&pmu_device);
	platform_device_register(&pmu_device);
	platform_device_register(&osc1_device);

	WARN_ON(clk_register_clkdev(vexpress_osc_setup(&osc1_device.dev),
			NULL, "ct:clcd"));
}
}


#ifdef CONFIG_SMP
#ifdef CONFIG_SMP
+0 −81
Original line number Original line Diff line number Diff line
#ifndef __MACH_MOTHERBOARD_H
#ifndef __MACH_MOTHERBOARD_H
#define __MACH_MOTHERBOARD_H
#define __MACH_MOTHERBOARD_H


#include <linux/clk-provider.h>

/*
/*
 * Physical addresses, offset from V2M_PA_CS0-3
 * Physical addresses, offset from V2M_PA_CS0-3
 */
 */
@@ -41,31 +39,6 @@
#define V2M_CF			(V2M_PA_CS7 + 0x0001a000)
#define V2M_CF			(V2M_PA_CS7 + 0x0001a000)
#define V2M_CLCD		(V2M_PA_CS7 + 0x0001f000)
#define V2M_CLCD		(V2M_PA_CS7 + 0x0001f000)


/*
 * Offsets from SYSREGS base
 */
#define V2M_SYS_ID		0x000
#define V2M_SYS_SW		0x004
#define V2M_SYS_LED		0x008
#define V2M_SYS_100HZ		0x024
#define V2M_SYS_FLAGS		0x030
#define V2M_SYS_FLAGSSET	0x030
#define V2M_SYS_FLAGSCLR	0x034
#define V2M_SYS_NVFLAGS		0x038
#define V2M_SYS_NVFLAGSSET	0x038
#define V2M_SYS_NVFLAGSCLR	0x03c
#define V2M_SYS_MCI		0x048
#define V2M_SYS_FLASH		0x03c
#define V2M_SYS_CFGSW		0x058
#define V2M_SYS_24MHZ		0x05c
#define V2M_SYS_MISC		0x060
#define V2M_SYS_DMA		0x064
#define V2M_SYS_PROCID0		0x084
#define V2M_SYS_PROCID1		0x088
#define V2M_SYS_CFGDATA		0x0a0
#define V2M_SYS_CFGCTRL		0x0a4
#define V2M_SYS_CFGSTAT		0x0a8



/*
/*
 * Interrupts.  Those in {} are for AMBA devices
 * Interrupts.  Those in {} are for AMBA devices
@@ -90,43 +63,6 @@
#define IRQ_V2M_PCIE		(32 + 17)
#define IRQ_V2M_PCIE		(32 + 17)




/*
 * Configuration
 */
#define SYS_CFG_START		(1 << 31)
#define SYS_CFG_WRITE		(1 << 30)
#define SYS_CFG_OSC		(1 << 20)
#define SYS_CFG_VOLT		(2 << 20)
#define SYS_CFG_AMP		(3 << 20)
#define SYS_CFG_TEMP		(4 << 20)
#define SYS_CFG_RESET		(5 << 20)
#define SYS_CFG_SCC		(6 << 20)
#define SYS_CFG_MUXFPGA		(7 << 20)
#define SYS_CFG_SHUTDOWN	(8 << 20)
#define SYS_CFG_REBOOT		(9 << 20)
#define SYS_CFG_DVIMODE		(11 << 20)
#define SYS_CFG_POWER		(12 << 20)
#define SYS_CFG_SITE(n)		((n) << 16)
#define SYS_CFG_SITE_MB		0
#define SYS_CFG_SITE_DB1	1
#define SYS_CFG_SITE_DB2	2
#define SYS_CFG_STACK(n)	((n) << 12)

#define SYS_CFG_ERR		(1 << 1)
#define SYS_CFG_COMPLETE	(1 << 0)

int v2m_cfg_write(u32 devfn, u32 data);
int v2m_cfg_read(u32 devfn, u32 *data);
void v2m_flags_set(u32 data);

/*
 * Miscellaneous
 */
#define SYS_MISC_MASTERSITE	(1 << 14)
#define SYS_PROCIDx_HBI_MASK	0xfff

int v2m_get_master_site(void);

/*
/*
 * Core tile IDs
 * Core tile IDs
 */
 */
@@ -149,21 +85,4 @@ struct ct_desc {


extern struct ct_desc *ct_desc;
extern struct ct_desc *ct_desc;


/*
 * OSC clock provider
 */
struct v2m_osc {
	struct clk_hw hw;
	u8 site; /* 0 = motherboard, 1 = site 1, 2 = site 2 */
	u8 stack; /* board stack position */
	u16 osc;
	unsigned long rate_min;
	unsigned long rate_max;
	unsigned long rate_default;
};

#define to_v2m_osc(osc) container_of(osc, struct v2m_osc, hw)

struct clk *v2m_osc_register(const char *name, struct v2m_osc *osc);

#endif
#endif
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